FreeCalypso > hg > freecalypso-tools
changeset 401:da6df2c626cf
target-utils: wait for FIFO not full in serial_out() instead of FIFO empty
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Sun, 18 Mar 2018 07:22:26 +0000 |
| parents | be2683e1ac5e |
| children | 817f3b5f019e |
| files | target-utils/libbase/serio.S |
| diffstat | 1 files changed, 3 insertions(+), 3 deletions(-) [+] |
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--- a/target-utils/libbase/serio.S Fri Mar 16 01:59:34 2018 +0000 +++ b/target-utils/libbase/serio.S Sun Mar 18 07:22:26 2018 +0000 @@ -10,9 +10,9 @@ serial_out: ldr r1, =uart_base ldr r2, [r1] -1: ldrb r3, [r2, #NS16550_LSR] - tst r3, #NS16550_LSR_THRE - beq 1b +1: ldrb r3, [r2, #0x11] @ Calypso UART non-std register SSR + tst r3, #0x01 @ Tx FIFO full flag + bne 1b strb r0, [r2, #NS16550_THR] bx lr