annotate gsm-fw/cfgmagic/post-target @ 937:631fb20ff8d4

gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal) in addition to the currently supported AMD multibank (Openmoko and Pirelli)
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Sat, 31 Oct 2015 21:50:43 +0000
parents 2c9c2b95ddec
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
88
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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1 # This shell script fragment is sourced after the selected target.
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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2 # Here we'll put code that logically goes with the target hw-related
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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3 # stuff, but which we wish to avoid duplicating in every target.*
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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4 # fragment.
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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5
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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6 # The per-target fragment must have defined CONFIG_IRAM_SIZE, CONFIG_XRAM_SIZE
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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7 # and CONFIG_FWFLASH_SIZE.
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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8 if [ -z "$CONFIG_IRAM_SIZE" ]
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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9 then
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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10 echo "Error: target.$TARGET failed to define CONFIG_IRAM_SIZE" 1>&2
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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11 exit 1
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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12 fi
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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13
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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14 if [ -z "$CONFIG_XRAM_SIZE" ]
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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15 then
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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16 echo "Error: target.$TARGET failed to define CONFIG_XRAM_SIZE" 1>&2
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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17 exit 1
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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18 fi
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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19
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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20 if [ -z "$CONFIG_FWFLASH_SIZE" ]
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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21 then
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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22 echo "Error: target.$TARGET failed to define CONFIG_FWFLASH_SIZE" 1>&2
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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23 exit 1
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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24 fi
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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25
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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26 # export them to C and to the m4-based ld script generation logic
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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27 export_to_c CONFIG_IRAM_SIZE
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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28 export_to_m4 CONFIG_IRAM_SIZE
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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29 export_to_c CONFIG_XRAM_SIZE
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30 export_to_m4 CONFIG_XRAM_SIZE
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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31 export_to_c CONFIG_FWFLASH_SIZE
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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32 export_to_m4 CONFIG_FWFLASH_SIZE
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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33
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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34 # Because we'll be using a lot of TI's code that is very liberally sprinkled
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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35 # with conditionals on their voodoo numbers for CHIPSET etc, we really have
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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36 # no choice but to continue using these nasty numbers, at least where
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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37 # possible.
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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38
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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39 if [ -z "$DBB_type" ]
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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40 then
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41 echo "Error: target.$TARGET failed to define DBB_type" 1>&2
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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42 exit 1
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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43 fi
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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44
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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45 case "$DBB_type" in
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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46 751992*)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
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47 # This chip is Calypso C035 with DSP version 36 in the ROM
88
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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48 CHIPSET=10
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
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49 DSP=36
113
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
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50 # Thanks to the Sotovik find, we now have authoritative
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
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51 # knowledge that these numbers are correct.
88
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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52 ;;
512
6f4cadd1fd7f gsm-fw/cfgmagic: beginning of Compal target support
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53 751749*)
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54 # Calypso Lite appears to be exactly the same as Calypso C035,
6f4cadd1fd7f gsm-fw/cfgmagic: beginning of Compal target support
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55 # but has only 256 KiB of IRAM instead of 512 KiB. Yet TI's
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parents: 154
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56 # firmware sources give it a different CHIPSET number.
6f4cadd1fd7f gsm-fw/cfgmagic: beginning of Compal target support
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57 # Let's try playing along...
6f4cadd1fd7f gsm-fw/cfgmagic: beginning of Compal target support
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parents: 154
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58 CHIPSET=11
6f4cadd1fd7f gsm-fw/cfgmagic: beginning of Compal target support
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 154
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59 DSP=36
6f4cadd1fd7f gsm-fw/cfgmagic: beginning of Compal target support
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parents: 154
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60 ;;
88
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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61 *)
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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62 echo "Error: unknown DBB_type=$DBB_type" 1>&2
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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63 exit 1
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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64 ;;
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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65 esac
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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66 export_to_c CHIPSET
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
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67 export_to_c DSP
88
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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68
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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69 if [ -z "$ABB_type" ]
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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70 then
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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71 echo "Error: target.$TARGET failed to define ABB_type" 1>&2
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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72 exit 1
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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73 fi
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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74
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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75 case "$ABB_type" in
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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76 Iota*)
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
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parents: 88
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77 ANALOG=2
88
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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78 ;;
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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79 Syren*)
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
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parents: 88
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80 ANALOG=3
88
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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81 ;;
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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82 *)
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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83 echo "Error: unknown ABB_type=$ABB_type" 1>&2
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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84 exit 1
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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85 ;;
ccde45a06737 nuc-fw: beginning of the configuration mechanism
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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86 esac
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 88
diff changeset
87 export_to_c ANALOG
88
ccde45a06737 nuc-fw: beginning of the configuration mechanism
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parents:
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88
113
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
89 if [ -z "$RF_type" ]
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
90 then
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
91 echo "Error: target.$TARGET failed to define RF_type" 1>&2
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
92 exit 1
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
93 fi
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
94
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
95 case "$RF_type" in
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
96 Rita*)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
97 RF_FAM=12
154
47754cdb6248 abb.c compiles!
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parents: 143
diff changeset
98 RF_PG=2
113
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
99 ;;
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
100 *)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
101 echo "Error: unknown RF_type=$RF_type" 1>&2
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
102 exit 1
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
103 ;;
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
104 esac
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
105 export_to_c RF_FAM
154
47754cdb6248 abb.c compiles!
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
106 export_to_c RF_PG
113
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
107
522
2c9c2b95ddec FC version of l1_rf12.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 512
diff changeset
108 if [ -z "$RF_PA" ]
2c9c2b95ddec FC version of l1_rf12.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 512
diff changeset
109 then
2c9c2b95ddec FC version of l1_rf12.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 512
diff changeset
110 echo "Error: target.$TARGET failed to define RF_PA" 1>&2
2c9c2b95ddec FC version of l1_rf12.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 512
diff changeset
111 exit 1
2c9c2b95ddec FC version of l1_rf12.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 512
diff changeset
112 fi
2c9c2b95ddec FC version of l1_rf12.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 512
diff changeset
113 export_to_c RF_PA
2c9c2b95ddec FC version of l1_rf12.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 512
diff changeset
114
937
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
diff changeset
115 if [ -z "$Flash_type" ]
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
diff changeset
116 then
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
diff changeset
117 echo "Error: target.$TARGET failed to define Flash_type" 1>&2
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
diff changeset
118 exit 1
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
diff changeset
119 fi
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
diff changeset
120
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
diff changeset
121 case "$Flash_type" in
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
diff changeset
122 AMD-multi*)
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
diff changeset
123 FLASH_IS_AMD_MULTIBANK=1
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parents: 522
diff changeset
124 export_to_c FLASH_IS_AMD_MULTIBANK
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
diff changeset
125 ;;
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
diff changeset
126 Intel-single* | Intel-one*)
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
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parents: 522
diff changeset
127 FLASH_IS_INTEL_ONEBANK=1
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
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parents: 522
diff changeset
128 export_to_c FLASH_IS_INTEL_ONEBANK
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
diff changeset
129 export_to_mk FLASH_IS_INTEL_ONEBANK
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
diff changeset
130 ;;
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
diff changeset
131 *)
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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132 echo "Error: unknown Flash_type=$Flash_type" 1>&2
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
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133 exit 1
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
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134 ;;
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
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135 esac
631fb20ff8d4 gsm-fw/cfgmagic: beginning of support for Intel single bank flash (Compal)
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 522
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136
113
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
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137 # !!! Dirty hack !!!
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parents: 93
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138 #
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
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139 # All targets which we currently support or have realistic prospects of
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
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140 # supporting are derived from TI's D-sample and/or Leonardo reference designs.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
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141 # TI's voodoo BOARD number for D-sample is 41, and Leonardo apparently
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
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142 # shared D-sample's number instead of having its own.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
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143 # My initial hope was to keep those BOARD conditionals out of our code,
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
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144 # but they are sprinkled so liberally throughout TI's code that it's
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
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145 # too much extra work to reshape them into something cleaner.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
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146 # So for now let's export a #define BOARD 41 for all targets
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
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147 # and leave it be.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
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148
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
149 BOARD=41
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
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150 export_to_c BOARD