FreeCalypso > hg > freecalypso-sw
changeset 113:3b2e941043d8
nuc-fw/bsp: niq32.c compiles
| author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
|---|---|
| date | Sun, 20 Oct 2013 21:12:41 +0000 |
| parents | 4179acab05f7 |
| children | 17b0511b243c |
| files | nuc-fw/Makefile nuc-fw/bsp/Makefile nuc-fw/bsp/armio.h nuc-fw/bsp/niq32.c nuc-fw/bsp/ulpd.h nuc-fw/cfgmagic/post-target nuc-fw/cfgmagic/target.gtamodem nuc-fw/cfgmagic/target.pirelli nuc-fw/config.sh |
| diffstat | 9 files changed, 382 insertions(+), 75 deletions(-) [+] |
line wrap: on
line diff
--- a/nuc-fw/Makefile Sun Oct 20 08:43:41 2013 +0000 +++ b/nuc-fw/Makefile Sun Oct 20 21:12:41 2013 +0000 @@ -1,4 +1,4 @@ -SUBDIR= finlink include nucdemo nucleus sprintf sysglue +SUBDIR= bsp finlink include nucdemo nucleus sprintf sysglue default: config.stamp ${MAKE} ${MFLAGS} -f Makefile.build $@
--- a/nuc-fw/bsp/Makefile Sun Oct 20 08:43:41 2013 +0000 +++ b/nuc-fw/bsp/Makefile Sun Oct 20 21:12:41 2013 +0000 @@ -4,7 +4,7 @@ AR= arm-elf-ar RANLIB= arm-elf-ranlib -IOBJS= armio.o inth.o +IOBJS= armio.o inth.o niq32.o XTOBJS= clkm.o niq.o
--- a/nuc-fw/bsp/armio.h Sun Oct 20 08:43:41 2013 +0000 +++ b/nuc-fw/bsp/armio.h Sun Oct 20 21:12:41 2013 +0000 @@ -54,7 +54,8 @@ #define ARMIO_RISING_EDGE (1) #if (CHIPSET != 12) - #define ARMIO_KEYPDAD_INT (0x0001) + #define ARMIO_KEYPAD_INT (0x0001) + #define ARMIO_KEYPDAD_INT ARMIO_KEYPAD_INT /* TI's misspelling */ #define ARMIO_GPIO_INT (0x0002) #define ARMIO_MASKIT_KBD (0x0001)
--- a/nuc-fw/bsp/niq32.c Sun Oct 20 08:43:41 2013 +0000 +++ b/nuc-fw/bsp/niq32.c Sun Oct 20 21:12:41 2013 +0000 @@ -24,12 +24,18 @@ *******************************************************************************/ -#include "l1sw.cfg" +#include "../include/config.h" +#include "../include/sys_types.h" -#include "chipset.cfg" -#include "board.cfg" -#include "rf.cfg" -#include "swconfig.cfg" +#include "inth.h" +#include "mem.h" +#include "iq.h" +#include "ulpd.h" +#include "armio.h" + +#if 0 + +/* original maze of includes */ #if(OP_L1_STANDALONE == 0) #include "debug.cfg" @@ -96,16 +102,19 @@ #endif #endif +/* end of original include maze */ +#endif + /* External declaration */ extern void GAUGING_Handler(void); extern void TMT_Timer_Interrupt(void); -#if (OP_L1_STANDALONE == 1) +#if 0 //(OP_L1_STANDALONE == 1) extern void TM_Timer1Handler(void); #endif extern void kpd_key_handler(void); extern void TP_FrameIntHandler(void); -#if (OP_L1_STANDALONE == 0) +#if 1 //(OP_L1_STANDALONE == 0) #if (defined RVM_MPM_SWE) extern void MPM_InterruptHandler(void); #endif @@ -123,8 +132,6 @@ extern void RTC_ItAlarmHandle(void); #endif - - /* Global variables */ unsigned IQ_TimerCount1; /* Used to check if timer is incrementing */ unsigned IQ_TimerCount2; /* Used to check if timer is incrementing */ @@ -133,8 +140,12 @@ unsigned IQ_FrameCount; /* Used to check if Frame IT TPU*/ unsigned IQ_GsmTimerCount; /* Used to check if GSM Timer IT */ +/* FreeCalypso: the following interrupt handlers remain to be integrated */ +#define SER_uart_modem_handler IQ_Dummy +#define SER_uart_irda_handler IQ_Dummy +#define SIM_IntHandler IQ_Dummy +#define SIM_CD_IntHandler IQ_Dummy -#if (CHIPSET != 12) /*--------------------------------------------------------------*/ /* irqHandlers */ /*--------------------------------------------------------------*/ @@ -152,7 +163,7 @@ IQ_Dummy, /* AIRQ 3 */ IQ_FrameHandler, /* TPU Frame It AIRQ 4 */ IQ_Dummy, /* AIRQ 5 */ -#if (OP_L1_STANDALONE == 0) +#if 1 //(OP_L1_STANDALONE == 0) SIM_IntHandler, /* AIRQ 6 */ #else IQ_Dummy, /* AIRQ 6 */ @@ -162,7 +173,7 @@ #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) SER_uart_modem_handler, /* AIRQ 7 */ #endif -#if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41)) +#if 1 //((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41)) // CC test 0316 IQ_KeypadGPIOHandler, /* AIRQ 8 */ // end @@ -201,7 +212,7 @@ IQ_Dummy, /* Not mapped interrupt */ IQ_Dummy /* GEA interrupt */ #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)) -#if (L1_DYN_DSP_DWNLD == 1) +#if 0 //(L1_DYN_DSP_DWNLD == 1) IQ_ApiHandler, /* LEAD */ #else IQ_Dummy, /* LEAD */ @@ -259,7 +270,7 @@ IQ_Dummy, /* AIRQ 13 Spi Tx Rx interrupt */ IQ_Dummy, /* DMA interrupt */ IQ_Dummy, /* LEAD */ - #if (OP_L1_STANDALONE == 0) + #if 1 //(OP_L1_STANDALONE == 0) SIM_CD_IntHandler, /* SIM card-detect fast interrupt */ #else IQ_Dummy, /* SIM card-detect fast interrupt */ @@ -288,7 +299,6 @@ #endif }; #endif -#endif /* (CHIPSET != 12)*/ /*--------------------------------------------------------------*/ /* IQ_Gauging_Handler */ @@ -299,10 +309,13 @@ /*--------------------------------------------------------------*/ void IQ_Gauging_Handler(void) { +#if 0 +// FreeCalypso: code not integrated yet GAUGING_Handler(); #if (OP_L1_STANDALONE == 0) RTC_GaugingHandler(); #endif +#endif } @@ -325,6 +338,8 @@ // The external IRQ is mapped on the ABB interrupt. // The associated HISR ABB_Hisr is activated on reception on the external IRQ. +#if 0 +// FreeCalypso: code not integrated yet if(Activate_ABB_HISR()) { #if (CHIPSET == 12) @@ -334,9 +349,9 @@ IQ_Unmask(IQ_EXT); #endif } +#endif } -#if (CHIPSET != 12) /*--------------------------------------------------------------*/ /* IQ_Dummy */ /*--------------------------------------------------------------*/ @@ -348,7 +363,6 @@ { IQ_DummyCount++; } -#endif /*--------------------------------------------------------------*/ /* IQ_RTCHandler */ @@ -360,7 +374,7 @@ void IQ_Rtc_Handler(void) { -#if (OP_L1_STANDALONE == 0) +#if 0 //(OP_L1_STANDALONE == 0) RTC_ItTimerHandle(); #endif } @@ -376,7 +390,7 @@ #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) void IQ_RtcA_Handler(void) { - #if (OP_L1_STANDALONE == 0) + #if 0 //(OP_L1_STANDALONE == 0) /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */ if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM ) RTC_ItAlarmHandle(); @@ -386,7 +400,7 @@ void IQ_GsmTim_Handler(void) { - if ( (* (SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM ) + if ( (* (SYS_UWORD16 *) ULPD_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM ) { // it is GSM Timer it..... IQ_GsmTimerCount++; @@ -396,7 +410,7 @@ void IQ_RtcA_GsmTim_Handler(void) { #if (OP_L1_STANDALONE == 0) - if ( (* (SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM ) + if ( (* (SYS_UWORD16 *) ULPD_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM ) { // it is GSM Timer it..... IQ_GsmTimerCount++; @@ -411,17 +425,6 @@ } #endif -#if (BOARD == 34) -/* - * IQ_IcrHandler32 - * - */ - void IQ_IcrHandler32(void) - { - CSMI_InterruptHandler(); - } -#endif - /*--------------------------------------------------------------*/ /* IQ_TimerHandler */ /*--------------------------------------------------------------*/ @@ -433,7 +436,7 @@ { IQ_TimerCount++; TMT_Timer_Interrupt(); - #if (defined RVM_DAR_SWE) && (defined _GSM) + #if 0 //(defined RVM_DAR_SWE) && (defined _GSM) dar_watchdog_reset(); #endif } @@ -449,7 +452,10 @@ { IQ_FrameCount++; TMT_Timer_Interrupt(); +#if 0 +// FreeCalypso: that L1 or whatever code hasn't been integrated yet TP_FrameIntHandler(); +#endif #if (OP_L1_STANDALONE == 0) #if (TI_PROFILER == 1) // TDMA treatment for profiling buffer @@ -484,8 +490,8 @@ { IQ_TimerCount2++; } -#if(L1_DYN_DSP_DWNLD == 1) +#if 0 //(L1_DYN_DSP_DWNLD == 1) /*-------------------------------------------------------*/ /* IQ_ApiHandler() */ /*-------------------------------------------------------*/ @@ -500,7 +506,6 @@ #endif -#if (CHIPSET !=12) /*--------------------------------------------------------------*/ /* IQ_IRQ_isr */ /*--------------------------------------------------------------*/ @@ -528,9 +533,6 @@ #endif * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_FIQ); /* valid next FIQ */ } -#endif /* chipset != 12 ) */ - -#if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41)) /*--------------------------------------------------------------*/ /* IQ_KeypadGPIOHandler */ @@ -541,14 +543,14 @@ /*--------------------------------------------------------------*/ // CC test 0316 //#include "rvm/rvm_use_id_list.h" -//#include "rvf/rvf_api.h" -//static char debug_buffer[50]; +//#include "rvf/rvf_api.h" +//static char debug_buffer[50]; // end void IQ_KeypadGPIOHandler(void) { - #if (OP_L1_STANDALONE == 0) + #if 0 //(OP_L1_STANDALONE == 0) /* * GPIO interrupt must be checked before the keypad interrupt. The GPIO * status bit is reset when the register is read. @@ -559,7 +561,7 @@ // CC test 0315 { AI_MaskIT (ARMIO_MASKIT_GPIO); -//sprintf(debug_buffer, "GPIO_Interrupt"); +//sprintf(debug_buffer, "GPIO_Interrupt"); //rvf_send_trace(debug_buffer, 40, NULL_PARAM, RV_TRACE_LEVEL_ERROR, RVT_USE_ID); AI_UnmaskIT(ARMIO_MASKIT_GPIO); //0x0002 // end @@ -575,10 +577,10 @@ #endif */ } - if (AI_CheckITSource (ARMIO_KEYPDAD_INT)) + if (AI_CheckITSource (ARMIO_KEYPAD_INT)) { -// CC test 0316 -//sprintf(debug_buffer, "Key_Interrupt"); +// CC test 0316 +//sprintf(debug_buffer, "Key_Interrupt"); //rvf_send_trace(debug_buffer, 40, NULL_PARAM, RV_TRACE_LEVEL_ERROR, RVT_USE_ID); // end kpd_key_handler (); @@ -586,25 +588,3 @@ #endif } - -#elif ((BOARD == 34) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45)) - -/*--------------------------------------------------------------*/ -/* IQ_KeypadHandler */ -/*--------------------------------------------------------------*/ -/* Parameters :none */ -/* Return : none */ -/* Functionality : Handle keypad interrupts */ -/*--------------------------------------------------------------*/ -void IQ_KeypadHandler(void) -{ - #if (OP_L1_STANDALONE == 0) - #if (BOARD == 34) - IQ_Mask (IQ_ARMIO); - #else - kpd_key_handler (); - #endif - #endif -} - -#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/nuc-fw/bsp/ulpd.h Sun Oct 20 21:12:41 2013 +0000 @@ -0,0 +1,294 @@ +/******************************************************************************* + TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION + + Property of Texas Instruments -- For Unrestricted Internal Use Only + Unauthorized reproduction and/or distribution is strictly prohibited. This + product is protected under copyright law and trade secret law as an + unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All + rights reserved. + + + Filename : ulpd.h + + Description : Header for HYPERION/ULPD module tests + Target : Arm + + Project : Hyperion + + Author : smunsch@tif.ti.com Sylvain Munsch. + + Version number : 1.11 + + Date and time : 12/20/00 10:17:22 + + Previous delta : 12/06/00 17:31:50 + + SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/mod/emu_p/EMU_P/drivers1/common/SCCS/s.ulpd.h + + Sccs Id (SID) : '@(#) ulpd.h 1.11 12/20/00 10:17:22 ' + + +*****************************************************************************/ + +#include "../include/config.h" + +#include <limits.h> +#include <float.h> + +// SLEEP MODES +//======================= +#define DO_NOT_SLEEP 00 +#define FRAME_STOP 01 // little BIG SLEEP (CUST5...) +#define CLOCK_STOP 02 // Deep sleep + + +// ULPD registers address +//======================= + +#define ULPD_XIO_START 0xfffe2000 + +#define ULPD_INC_FRAC_REG (SYS_UWORD16 *)(ULPD_XIO_START) +#define ULPD_INC_SIXTEENTH_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 1) +#define ULPD_SIXTEENTH_START_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 2) +#define ULPD_SIXTEENTH_STOP_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 3) +#define ULPD_COUNTER_32_LSB_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 4) +#define ULPD_COUNTER_32_MSB_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 5) +#define ULPD_COUNTER_HI_FREQ_LSB_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 6) +#define ULPD_COUNTER_HI_FREQ_MSB_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 7) +#define ULPD_GAUGING_CTRL_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 8) +#define ULPD_GAUGING_STATUS_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 9) +#define ULPD_GSM_TIMER_CTRL_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 10) +#define ULPD_GSM_TIMER_INIT_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 11) +#define ULPD_GSM_TIMER_VALUE_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 12) +#define ULPD_GSM_TIMER_IT_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 13) +#define ULPD_SETUP_CLK13_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 14) +#define ULPD_SETUP_SLICER_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 15) +#define ULPD_SETUP_VTCXO_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 16) +#define ULPD_SETUP_FRAME_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 17) +#define ULPD_SETUP_RF_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 18) + +/* TI's dyslexia */ +#define ULDP_INC_SIXTEENTH_REG ULPD_INC_SIXTEENTH_REG +#define ULDP_SIXTEENTH_START_REG ULPD_SIXTEENTH_START_REG +#define ULDP_SIXTEENTH_STOP_REG ULPD_SIXTEENTH_STOP_REG +#define ULDP_COUNTER_32_LSB_REG ULPD_COUNTER_32_LSB_REG +#define ULDP_COUNTER_32_MSB_REG ULPD_COUNTER_32_MSB_REG +#define ULDP_COUNTER_HI_FREQ_LSB_REG ULPD_COUNTER_HI_FREQ_LSB_REG +#define ULDP_COUNTER_HI_FREQ_MSB_REG ULPD_COUNTER_HI_FREQ_MSB_REG +#define ULDP_GAUGING_CTRL_REG ULPD_GAUGING_CTRL_REG +#define ULDP_GAUGING_STATUS_REG ULPD_GAUGING_STATUS_REG +#define ULDP_GSM_TIMER_CTRL_REG ULPD_GSM_TIMER_CTRL_REG +#define ULDP_GSM_TIMER_INIT_REG ULPD_GSM_TIMER_INIT_REG +#define ULDP_GSM_TIMER_VALUE_REG ULPD_GSM_TIMER_VALUE_REG +#define ULDP_GSM_TIMER_IT_REG ULPD_GSM_TIMER_IT_REG +#define ULDP_SETUP_CLK13_REG ULPD_SETUP_CLK13_REG +#define ULDP_SETUP_SLICER_REG ULPD_SETUP_SLICER_REG +#define ULDP_SETUP_VTCXO_REG ULPD_SETUP_VTCXO_REG +#define ULDP_SETUP_FRAME_REG ULPD_SETUP_FRAME_REG + +// ULPD gauging control register description +//========================================== + +#define ULPD_GAUGING_EN 0x0001 // Gauging is running +#define ULPD_GAUGING_TYPE_HF 0x0002 // Gauging versus HFclock +#define ULPD_SEL_HF_PLL 0x0004 // High freq clock = PLL DSP + +/* more dyslexia */ +#define ULDP_GAUGING_EN ULPD_GAUGING_EN +#define ULDP_GAUGING_TYPE_HF ULPD_GAUGING_TYPE_HF +#define ULDP_SEL_HF_PLL ULPD_SEL_HF_PLL + +// ULPD gauging status register description +//========================================== + +#define ULPD_IT_GAUGING 0x0001 // Interrupt it_gauging occurence +#define ULPD_OVF_HF 0x0002 // Overflow on the HF counter +#define ULPD_OVF_32 0x0004 // Overflow on the 32 Khz counter + +#define ULDP_IT_GAUGING ULPD_IT_GAUGING +#define ULDP_OVF_HF ULPD_OVF_HF +#define ULDP_OVF_32 ULPD_OVF_32 + +// WAKEup time +//========================================== +// the setup time unit is the number of 32 Khz clock periods + +#if (BOARD == 34) + +#define SETUP_RF 75 // adujstement time to minimize big_sleep duration + // The SETUP_RF value must be used to delay as much as possible the true + // start time of the deep_sleep wake-up sequence for power consumption saving. + // This is required because the unit of the SETUP_FRAME counter is the + // GSM TDMA frame and not a T32K time period. + +#define SETUP_VTCXO 320 // The setup_vtcxo is the time the external RF device takes to deliver + // stable signals to the VTCXO + + +#define SETUP_SLICER 180 // The setup_slicer is the time that the vtcxo takes to deliver + // a stable output when vtcxo is enabled : usually 2 to 5ms + // The SETUP_SLICER value should be smaller than 160(=4,8ms) but this + // parameter is directly related to the VTCXO device used in the phone + // and consequently must be retrieved from the VTCXO data-sheet. + +#define SETUP_CLK13 31 // The setup_clk13 is time that the slicer takes to deliver + // a stable output when slicer is enabled : max conservative value 1ms + +#else + +#define SETUP_RF 0 // adujstement time to minimize big_sleep duration + // The SETUP_RF value must be used to delay as much as possible the true + // start time of the deep_sleep wake-up sequence for power consumption saving. + // This is required because the unit of the SETUP_FRAME counter is the + // GSM TDMA frame and not a T32K time period. +#if (CHIPSET == 2) + #define SETUP_VTCXO 31 // The setup_vtcxo is the time the external RF device takes to deliver +#else // stable signals to the VTCXO + #define SETUP_VTCXO 1114 // 34 ms for ABB LDO stabilization before 13MHz switch ON + // Minimum value to be sure that ABB is awake while the DBB start running for + // SETUP_VTCXO = ((SLPDLY*16)+4+145)*T32KHz +#endif + +#if (BOARD == 40) || (BOARD == 41) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45) + #if (RF_FAM==12) + #define SETUP_SLICER 660 + #else + #define SETUP_SLICER 600 // 600/32x10^3 = 18.75ms required for VCXO stabilization + #endif +#else + #define SETUP_SLICER 180 // The setup_slicer is the time that the vtcxo takes to deliver + // a stable output when vtcxo is enabled : usually 2 to 5ms + // The SETUP_SLICER value should be smaller than 160(=4,8ms) but this + // parameter is directly related to the VTCXO device used in the phone + // and consequently must be retrieved from the VTCXO data-sheet. +#endif + +#define SETUP_CLK13 31 // The setup_clk13 is time that the slicer takes to deliver + // a stable output when slicer is enabled : max conservative value 1ms + +#endif // BOARD == 34 + +// SETUP_FRAME: +//------------- +// CF. Reference document: ULYS015 v1.1 page 24 +// 1) Nominal Frequency = 32.768 Khz => 0.03051757 ms +// (0.03051757 ms / 4.615 ms) = 0.006612692 Frames +// 2) The use of the RFEN signal is optional. It is necessary if the VTCXO function +// is part of an RF IC which must be first powered before enabling the VTCXO. +// However it can be use for any other purpose. +// 3) The term (1-DBL_EPSILON) corresponds to the rounding up of SETUP_FRAME. +#ifndef DBL_EPSILON //CQ16723: For non TI compiler, DBL_EPSILON can be undefined. + #define DBL_EPSILON 0 +#endif + +#define SETUP_FRAME ((( SETUP_RF+SETUP_VTCXO+SETUP_SLICER+SETUP_CLK13)*0.006612692)+(1-DBL_EPSILON)) + +#define MAX_GSM_TIMER 65535 // max duration for the wake up timer + + +// Default values for Cell selection and CS_MODE0 +//=============================================== +#define DEFAULT_HFMHZ_VALUE (13000000*l1_config.dpll) +#define DEFAULT_32KHZ_VALUE (32768) // real value 32768.29038 hz +//with l1ctl_pgm_clk32(DEFAULT_HFMHZ_VALUE,DEFAULT_32KHZ_VALUE) and dpll = 65Mhz +// => DEFAULT_INCSIXTEEN 132 +// => DEFAULT_INCFRAC 15915 + + + + + +// ULPD GSM timer control register description +//============================================ + +#define ULPD_TM_LOAD 0x0001 // load the timer with init value +#define ULPD_TM_FREEZE 0x0002 // 1=> GSM timer is frozen +#define ULPD_IT_TIMER_GSM 0x0001 // Interrupt timer occurrence + +/* TI's dyslexia */ +#define ULDP_TM_LOAD ULPD_TM_LOAD +#define ULDP_TM_FREEZE ULPD_TM_FREEZE + +/* + * The following accessor macros all have dyslexic names, unfortunately. + * Too much of a pita to rename them all, so I'm leaving them be for now. + * -SF + */ + +// ULDP_INCFRAC_UPDATE : update INCFRAC (16 bits) +//================================================ +#define ULDP_INCFRAC_UPDATE(frac) (* (volatile SYS_UWORD16 *)ULPD_INC_FRAC_REG = frac) + + +// ULDP_INCSIXTEEN_UPDATE : update INCSIXTEEN (12 bits) +//====================================================== +#define ULDP_INCSIXTEEN_UPDATE(inc) (* (volatile SYS_UWORD16 *)ULDP_INC_SIXTEENTH_REG = inc) + + +// ULDP_GAUGING_RUN : Start the gauging +//===================================== +#define ULDP_GAUGING_RUN (* (volatile SYS_UWORD16 *)ULDP_GAUGING_CTRL_REG |= ULDP_GAUGING_EN) + + +// ULDP_GAUGING_STATUS : Return if it gauging occurence +//====================================================== +#define ULDP_GAUGING_STATUS ((* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_GAUGING_EN ) + +// ULDP_GAUGING_STOP : Stop the gauging +//===================================== +#define ULDP_GAUGING_STOP (* (volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG &= ~ULDP_GAUGING_EN) + +// ULDP_GAUGING_START : Stop the gauging +//===================================== +#define ULDP_GAUGING_START (* (volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG |= ULDP_GAUGING_EN) + +// ULDP_GAUGING_SET_HF : Set the gauging versus HF clock +//====================================================== +#define ULDP_GAUGING_SET_HF (* (volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG |= ULDP_GAUGING_TYPE_HF) + +// ULDP_GAUGING_HF_PLL : Set the gauging HF versus PLL clock +//=========================================================== +#define ULDP_GAUGING_HF_PLL (* (volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG |= ULDP_SEL_HF_PLL) + + +// ULDP_GET_IT_GAG : Return if the interrupt it gauging occurence +//================================================================ +#define ULDP_GET_IT_GAG ((* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_IT_GAUGING ) + +// ULDP_GET_OVF_HF : Return overflow occured on the HF counter +//============================================================= +#define ULDP_GET_OVF_HF (((* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_OVF_HF)>>1) + +// ULDP_GET_OVF_32 : Return overflow occured on the 32 counter +//============================================================= +#define ULDP_GET_OVF_32 (((* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_OVF_32)>>2) + +// ULDP_TIMER_INIT : Load the timer_init value +//========================================================= +#define ULDP_TIMER_INIT(value) ((* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_INIT_REG) = value) + +// READ_ULDP_TIMER_INIT : Read the timer_init value +//========================================================= +#define READ_ULDP_TIMER_INIT (* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_INIT_REG) + +// READ_ULDP_TIMER_VALUE : Read the timer_init value +//========================================================= +#define READ_ULDP_TIMER_VALUE (* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_VALUE_REG) + +// ULDP_TIMER_LD : Load the timer with timer_init value +//========================================================= +#define ULDP_TIMER_LD ((* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_CTRL_REG) |= ULDP_TM_LOAD) + +// ULDP_TIMER_FREEZE : Freeze the timer +//========================================================= +#define ULDP_TIMER_FREEZE ((* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_CTRL_REG) |= ULDP_TM_FREEZE) + +// ULDP_GSM_TIME_START : Run the GSM timer +//========================================= +#define ULDP_TIMER_START ((* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_CTRL_REG) &= ~ULDP_TM_FREEZE) + +// ULDP_GET_IT_TIMER : Return the it GSM timer occurence +//=========================================================== +#define ULDP_GET_IT_TIMER ((* (volatile SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM ) + +
--- a/nuc-fw/cfgmagic/post-target Sun Oct 20 08:43:41 2013 +0000 +++ b/nuc-fw/cfgmagic/post-target Sun Oct 20 21:12:41 2013 +0000 @@ -44,11 +44,9 @@ case "$DBB_type" in 751992*) - # This is the only Calypso variant we currently work with, - # and we have no authoritative knowledge of the correct - # CHIPSET number - only a current best guess. CHIPSET=10 - # let's hope for the best + # Thanks to the Sotovik find, we now have authoritative + # knowledge that this number is correct. ;; *) echo "Error: unknown DBB_type=$DBB_type" 1>&2 @@ -77,6 +75,38 @@ esac export_to_c ANALOG +if [ -z "$RF_type" ] +then + echo "Error: target.$TARGET failed to define RF_type" 1>&2 + exit 1 +fi + +case "$RF_type" in + Rita*) + RF_FAM=12 + ;; + *) + echo "Error: unknown RF_type=$RF_type" 1>&2 + exit 1 + ;; +esac +export_to_c RF_FAM + +# !!! Dirty hack !!! +# +# All targets which we currently support or have realistic prospects of +# supporting are derived from TI's D-sample and/or Leonardo reference designs. +# TI's voodoo BOARD number for D-sample is 41, and Leonardo apparently +# shared D-sample's number instead of having its own. +# My initial hope was to keep those BOARD conditionals out of our code, +# but they are sprinkled so liberally throughout TI's code that it's +# too much extra work to reshape them into something cleaner. +# So for now let's export a #define BOARD 41 for all targets +# and leave it be. + +BOARD=41 +export_to_c BOARD + # Ensure that device_class is set - various feature configurations # will certainly depend on it. if [ -z "$device_class" ]
--- a/nuc-fw/cfgmagic/target.gtamodem Sun Oct 20 08:43:41 2013 +0000 +++ b/nuc-fw/cfgmagic/target.gtamodem Sun Oct 20 21:12:41 2013 +0000 @@ -11,4 +11,5 @@ DBB_type=751992A ABB_type=Iota3025 +RF_type=Rita # the post-target fragment will turn these into TI's voodoo numbers
--- a/nuc-fw/cfgmagic/target.pirelli Sun Oct 20 08:43:41 2013 +0000 +++ b/nuc-fw/cfgmagic/target.pirelli Sun Oct 20 21:12:41 2013 +0000 @@ -11,4 +11,5 @@ DBB_type=751992A ABB_type=Iota3014 +RF_type=Rita # the post-target fragment will turn these into TI's voodoo numbers
--- a/nuc-fw/config.sh Sun Oct 20 08:43:41 2013 +0000 +++ b/nuc-fw/config.sh Sun Oct 20 21:12:41 2013 +0000 @@ -6,7 +6,7 @@ echo 'Please select the target you wish to build the firmware for:' echo -echo '1: Closedmoko GTA01/02 GSM modem' +echo '1: Openmoko GTA01/02 GSM modem' echo '2: Pirelli DP-L10 feature phone' echo echo -n 'Please make your selection: '