changeset 10:db8acc067542

fpga/sniffer-basic/sniff_rx.v: typo in signal name
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 21 Aug 2023 01:05:25 +0000
parents 10c779b8753e
children 3da4676dafa8
files fpga/sniffer-basic/sniff_rx.v
diffstat 1 files changed, 1 insertions(+), 1 deletions(-) [+]
line wrap: on
line diff
--- a/fpga/sniffer-basic/sniff_rx.v	Mon Aug 21 01:00:16 2023 +0000
+++ b/fpga/sniffer-basic/sniff_rx.v	Mon Aug 21 01:05:25 2023 +0000
@@ -54,7 +54,7 @@
 
 assign Rx_strobe = rx_active && SIM_CLK_edge && clk_count == 10'd0 &&
 		   bit_count == 4'd10;
-assign Rx_error = Rx_strobe && !SIO_IO_sync;
+assign Rx_error = Rx_strobe && !SIM_IO_sync;
 assign Rx_char = shift_reg[8:1];
 assign Rx_start_bit = shift_reg[0];
 assign Rx_parity_bit = shift_reg[9];