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annotate src/cs/drivers/drv_app/r2d/lcds/luna/r2d_task_init_i.c @ 193:6a53de2c4fc2

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R2D sync with Magnetite R2D is never compiled in Selenite, thus the present change has absolutely no impact on anything - but this sync is being done in order to keep the overall diff between Magnetite and Selenite to a minimum.
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 23 May 2020 07:13:36 +0000
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children
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193
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1 #include "r2d/lcds/luna/r2d_luna_lcd.h"
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2
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3 #define R2D_MB_PRIM_SIZE (4000)
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4
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5 static void r2d_refresh_task_init(void)
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6 {
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7 /* reset pulse */
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8 CNTL_RST_REG |= EXT_RESET;
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9 rvf_delay(RVF_MS_TO_TICKS(10));
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10 CNTL_RST_REG &= ~EXT_RESET;
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11 /* finish the job in the running R2D refresh task */
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12 }
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13
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14 void r2d_refresh_task_secondary_init(void)
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15 {
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16 UINT32 i;
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17
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18 rvf_delay(RVF_MS_TO_TICKS(50));
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19 /* start register init */
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20 LCD_REG_WR(0x0001, 0x011c); // set SS and NL bit
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21 LCD_REG_WR(0x0002, 0x0100); // set 1 line inversion
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22 LCD_REG_WR(0x0003, 0x1030); // set GRAM write direction and BGR=1.
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23 LCD_REG_WR(0x0008, 0x0808); // set BP and FP
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24 LCD_REG_WR(0x000F, 0x0901); // Set frame rate
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25 rvf_delay(RVF_MS_TO_TICKS(10));
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26 LCD_REG_WR(0x0010, 0x0000); // Set SAP,DSTB,STB
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27 LCD_REG_WR(0x0011, 0x1B41); // Set APON,PON,AON,VCI1EN,VC
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28 rvf_delay(RVF_MS_TO_TICKS(50));
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29 LCD_REG_WR(0x0012, 0x200E); // Internal reference voltage= Vci;
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30 LCD_REG_WR(0x0013, 0x0052); // Set GVDD
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31 LCD_REG_WR(0x0014, 0x4B5C); // Set VCOMH/VCOML voltage
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32 //------------- Set GRAM area ------------------//
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33 LCD_REG_WR(0x0030, 0x0000);
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34 LCD_REG_WR(0x0031, 0x00DB);
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35 LCD_REG_WR(0x0032, 0x0000);
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36 LCD_REG_WR(0x0033, 0x0000);
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37 LCD_REG_WR(0x0034, 0x00DB);
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38 LCD_REG_WR(0x0035, 0x0000);
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39 LCD_REG_WR(0x0036, 0x00AF);
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40 LCD_REG_WR(0x0037, 0x0000);
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41 LCD_REG_WR(0x0038, 0x00DB);
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42 LCD_REG_WR(0x0039, 0x0000);
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43 // ----------- Adjust the Gamma Curve ----------//
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44 LCD_REG_WR(0x0050, 0x0000);
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45 LCD_REG_WR(0x0051, 0x0705);
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46 LCD_REG_WR(0x0052, 0x0C0A);
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47 LCD_REG_WR(0x0053, 0x0401);
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48 LCD_REG_WR(0x0054, 0x040C);
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49 LCD_REG_WR(0x0055, 0x0608);
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50 LCD_REG_WR(0x0056, 0x0000);
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51 LCD_REG_WR(0x0057, 0x0104);
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52 LCD_REG_WR(0x0058, 0x0E06);
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53 LCD_REG_WR(0x0059, 0x060E);
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54 rvf_delay(RVF_MS_TO_TICKS(50));
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55 LCD_REG_WR(0x0007, 0x1017);
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56
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57 /* initial hw framebuffer clearing */
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58 LCD_REG_WR(0x20, 0);
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59 LCD_REG_WR(0x21, 0);
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60 LCD_IR = 0x22;
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61 for (i = 0; i < 176*220; i++)
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62 LCD_DR = 0xFFFF; /* white color */
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63 }
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64
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65 static void r2d_refresh_task_kill(void)
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66 {
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67 }
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68
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69 static void r2d_dithering_init(void)
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70 {
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71 R2D_MALLOC(r2d_mb_id,UINT32,sizeof(UINT32)*4,r2d_g_dithering_matrix);
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72 if (r2d_g_dithering_matrix!=NULL)
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73 {
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74 r2d_g_dithering_matrix[0]=0;
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75 r2d_g_dithering_matrix[1]=2;
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76 r2d_g_dithering_matrix[2]=3;
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77 r2d_g_dithering_matrix[3]=1;
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78 }
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79 }