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comparison src/cs/drivers/drv_app/r2d/lcds/luna/r2d_task_init_i.c @ 193:6a53de2c4fc2

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R2D sync with Magnetite R2D is never compiled in Selenite, thus the present change has absolutely no impact on anything - but this sync is being done in order to keep the overall diff between Magnetite and Selenite to a minimum.
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 23 May 2020 07:13:36 +0000
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192:4f40ae165be4 193:6a53de2c4fc2
1 #include "r2d/lcds/luna/r2d_luna_lcd.h"
2
3 #define R2D_MB_PRIM_SIZE (4000)
4
5 static void r2d_refresh_task_init(void)
6 {
7 /* reset pulse */
8 CNTL_RST_REG |= EXT_RESET;
9 rvf_delay(RVF_MS_TO_TICKS(10));
10 CNTL_RST_REG &= ~EXT_RESET;
11 /* finish the job in the running R2D refresh task */
12 }
13
14 void r2d_refresh_task_secondary_init(void)
15 {
16 UINT32 i;
17
18 rvf_delay(RVF_MS_TO_TICKS(50));
19 /* start register init */
20 LCD_REG_WR(0x0001, 0x011c); // set SS and NL bit
21 LCD_REG_WR(0x0002, 0x0100); // set 1 line inversion
22 LCD_REG_WR(0x0003, 0x1030); // set GRAM write direction and BGR=1.
23 LCD_REG_WR(0x0008, 0x0808); // set BP and FP
24 LCD_REG_WR(0x000F, 0x0901); // Set frame rate
25 rvf_delay(RVF_MS_TO_TICKS(10));
26 LCD_REG_WR(0x0010, 0x0000); // Set SAP,DSTB,STB
27 LCD_REG_WR(0x0011, 0x1B41); // Set APON,PON,AON,VCI1EN,VC
28 rvf_delay(RVF_MS_TO_TICKS(50));
29 LCD_REG_WR(0x0012, 0x200E); // Internal reference voltage= Vci;
30 LCD_REG_WR(0x0013, 0x0052); // Set GVDD
31 LCD_REG_WR(0x0014, 0x4B5C); // Set VCOMH/VCOML voltage
32 //------------- Set GRAM area ------------------//
33 LCD_REG_WR(0x0030, 0x0000);
34 LCD_REG_WR(0x0031, 0x00DB);
35 LCD_REG_WR(0x0032, 0x0000);
36 LCD_REG_WR(0x0033, 0x0000);
37 LCD_REG_WR(0x0034, 0x00DB);
38 LCD_REG_WR(0x0035, 0x0000);
39 LCD_REG_WR(0x0036, 0x00AF);
40 LCD_REG_WR(0x0037, 0x0000);
41 LCD_REG_WR(0x0038, 0x00DB);
42 LCD_REG_WR(0x0039, 0x0000);
43 // ----------- Adjust the Gamma Curve ----------//
44 LCD_REG_WR(0x0050, 0x0000);
45 LCD_REG_WR(0x0051, 0x0705);
46 LCD_REG_WR(0x0052, 0x0C0A);
47 LCD_REG_WR(0x0053, 0x0401);
48 LCD_REG_WR(0x0054, 0x040C);
49 LCD_REG_WR(0x0055, 0x0608);
50 LCD_REG_WR(0x0056, 0x0000);
51 LCD_REG_WR(0x0057, 0x0104);
52 LCD_REG_WR(0x0058, 0x0E06);
53 LCD_REG_WR(0x0059, 0x060E);
54 rvf_delay(RVF_MS_TO_TICKS(50));
55 LCD_REG_WR(0x0007, 0x1017);
56
57 /* initial hw framebuffer clearing */
58 LCD_REG_WR(0x20, 0);
59 LCD_REG_WR(0x21, 0);
60 LCD_IR = 0x22;
61 for (i = 0; i < 176*220; i++)
62 LCD_DR = 0xFFFF; /* white color */
63 }
64
65 static void r2d_refresh_task_kill(void)
66 {
67 }
68
69 static void r2d_dithering_init(void)
70 {
71 R2D_MALLOC(r2d_mb_id,UINT32,sizeof(UINT32)*4,r2d_g_dithering_matrix);
72 if (r2d_g_dithering_matrix!=NULL)
73 {
74 r2d_g_dithering_matrix[0]=0;
75 r2d_g_dithering_matrix[1]=2;
76 r2d_g_dithering_matrix[2]=3;
77 r2d_g_dithering_matrix[3]=1;
78 }
79 }