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nuc-fw/bsp: niq32.c compiles
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sun, 20 Oct 2013 21:12:41 +0000
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112:4179acab05f7 113:3b2e941043d8
1 /*******************************************************************************
2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
3
4 Property of Texas Instruments -- For Unrestricted Internal Use Only
5 Unauthorized reproduction and/or distribution is strictly prohibited. This
6 product is protected under copyright law and trade secret law as an
7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
8 rights reserved.
9
10
11 Filename : ulpd.h
12
13 Description : Header for HYPERION/ULPD module tests
14 Target : Arm
15
16 Project : Hyperion
17
18 Author : smunsch@tif.ti.com Sylvain Munsch.
19
20 Version number : 1.11
21
22 Date and time : 12/20/00 10:17:22
23
24 Previous delta : 12/06/00 17:31:50
25
26 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/mod/emu_p/EMU_P/drivers1/common/SCCS/s.ulpd.h
27
28 Sccs Id (SID) : '@(#) ulpd.h 1.11 12/20/00 10:17:22 '
29
30
31 *****************************************************************************/
32
33 #include "../include/config.h"
34
35 #include <limits.h>
36 #include <float.h>
37
38 // SLEEP MODES
39 //=======================
40 #define DO_NOT_SLEEP 00
41 #define FRAME_STOP 01 // little BIG SLEEP (CUST5...)
42 #define CLOCK_STOP 02 // Deep sleep
43
44
45 // ULPD registers address
46 //=======================
47
48 #define ULPD_XIO_START 0xfffe2000
49
50 #define ULPD_INC_FRAC_REG (SYS_UWORD16 *)(ULPD_XIO_START)
51 #define ULPD_INC_SIXTEENTH_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 1)
52 #define ULPD_SIXTEENTH_START_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 2)
53 #define ULPD_SIXTEENTH_STOP_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 3)
54 #define ULPD_COUNTER_32_LSB_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 4)
55 #define ULPD_COUNTER_32_MSB_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 5)
56 #define ULPD_COUNTER_HI_FREQ_LSB_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 6)
57 #define ULPD_COUNTER_HI_FREQ_MSB_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 7)
58 #define ULPD_GAUGING_CTRL_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 8)
59 #define ULPD_GAUGING_STATUS_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 9)
60 #define ULPD_GSM_TIMER_CTRL_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 10)
61 #define ULPD_GSM_TIMER_INIT_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 11)
62 #define ULPD_GSM_TIMER_VALUE_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 12)
63 #define ULPD_GSM_TIMER_IT_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 13)
64 #define ULPD_SETUP_CLK13_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 14)
65 #define ULPD_SETUP_SLICER_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 15)
66 #define ULPD_SETUP_VTCXO_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 16)
67 #define ULPD_SETUP_FRAME_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 17)
68 #define ULPD_SETUP_RF_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 18)
69
70 /* TI's dyslexia */
71 #define ULDP_INC_SIXTEENTH_REG ULPD_INC_SIXTEENTH_REG
72 #define ULDP_SIXTEENTH_START_REG ULPD_SIXTEENTH_START_REG
73 #define ULDP_SIXTEENTH_STOP_REG ULPD_SIXTEENTH_STOP_REG
74 #define ULDP_COUNTER_32_LSB_REG ULPD_COUNTER_32_LSB_REG
75 #define ULDP_COUNTER_32_MSB_REG ULPD_COUNTER_32_MSB_REG
76 #define ULDP_COUNTER_HI_FREQ_LSB_REG ULPD_COUNTER_HI_FREQ_LSB_REG
77 #define ULDP_COUNTER_HI_FREQ_MSB_REG ULPD_COUNTER_HI_FREQ_MSB_REG
78 #define ULDP_GAUGING_CTRL_REG ULPD_GAUGING_CTRL_REG
79 #define ULDP_GAUGING_STATUS_REG ULPD_GAUGING_STATUS_REG
80 #define ULDP_GSM_TIMER_CTRL_REG ULPD_GSM_TIMER_CTRL_REG
81 #define ULDP_GSM_TIMER_INIT_REG ULPD_GSM_TIMER_INIT_REG
82 #define ULDP_GSM_TIMER_VALUE_REG ULPD_GSM_TIMER_VALUE_REG
83 #define ULDP_GSM_TIMER_IT_REG ULPD_GSM_TIMER_IT_REG
84 #define ULDP_SETUP_CLK13_REG ULPD_SETUP_CLK13_REG
85 #define ULDP_SETUP_SLICER_REG ULPD_SETUP_SLICER_REG
86 #define ULDP_SETUP_VTCXO_REG ULPD_SETUP_VTCXO_REG
87 #define ULDP_SETUP_FRAME_REG ULPD_SETUP_FRAME_REG
88
89 // ULPD gauging control register description
90 //==========================================
91
92 #define ULPD_GAUGING_EN 0x0001 // Gauging is running
93 #define ULPD_GAUGING_TYPE_HF 0x0002 // Gauging versus HFclock
94 #define ULPD_SEL_HF_PLL 0x0004 // High freq clock = PLL DSP
95
96 /* more dyslexia */
97 #define ULDP_GAUGING_EN ULPD_GAUGING_EN
98 #define ULDP_GAUGING_TYPE_HF ULPD_GAUGING_TYPE_HF
99 #define ULDP_SEL_HF_PLL ULPD_SEL_HF_PLL
100
101 // ULPD gauging status register description
102 //==========================================
103
104 #define ULPD_IT_GAUGING 0x0001 // Interrupt it_gauging occurence
105 #define ULPD_OVF_HF 0x0002 // Overflow on the HF counter
106 #define ULPD_OVF_32 0x0004 // Overflow on the 32 Khz counter
107
108 #define ULDP_IT_GAUGING ULPD_IT_GAUGING
109 #define ULDP_OVF_HF ULPD_OVF_HF
110 #define ULDP_OVF_32 ULPD_OVF_32
111
112 // WAKEup time
113 //==========================================
114 // the setup time unit is the number of 32 Khz clock periods
115
116 #if (BOARD == 34)
117
118 #define SETUP_RF 75 // adujstement time to minimize big_sleep duration
119 // The SETUP_RF value must be used to delay as much as possible the true
120 // start time of the deep_sleep wake-up sequence for power consumption saving.
121 // This is required because the unit of the SETUP_FRAME counter is the
122 // GSM TDMA frame and not a T32K time period.
123
124 #define SETUP_VTCXO 320 // The setup_vtcxo is the time the external RF device takes to deliver
125 // stable signals to the VTCXO
126
127
128 #define SETUP_SLICER 180 // The setup_slicer is the time that the vtcxo takes to deliver
129 // a stable output when vtcxo is enabled : usually 2 to 5ms
130 // The SETUP_SLICER value should be smaller than 160(=4,8ms) but this
131 // parameter is directly related to the VTCXO device used in the phone
132 // and consequently must be retrieved from the VTCXO data-sheet.
133
134 #define SETUP_CLK13 31 // The setup_clk13 is time that the slicer takes to deliver
135 // a stable output when slicer is enabled : max conservative value 1ms
136
137 #else
138
139 #define SETUP_RF 0 // adujstement time to minimize big_sleep duration
140 // The SETUP_RF value must be used to delay as much as possible the true
141 // start time of the deep_sleep wake-up sequence for power consumption saving.
142 // This is required because the unit of the SETUP_FRAME counter is the
143 // GSM TDMA frame and not a T32K time period.
144 #if (CHIPSET == 2)
145 #define SETUP_VTCXO 31 // The setup_vtcxo is the time the external RF device takes to deliver
146 #else // stable signals to the VTCXO
147 #define SETUP_VTCXO 1114 // 34 ms for ABB LDO stabilization before 13MHz switch ON
148 // Minimum value to be sure that ABB is awake while the DBB start running for
149 // SETUP_VTCXO = ((SLPDLY*16)+4+145)*T32KHz
150 #endif
151
152 #if (BOARD == 40) || (BOARD == 41) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45)
153 #if (RF_FAM==12)
154 #define SETUP_SLICER 660
155 #else
156 #define SETUP_SLICER 600 // 600/32x10^3 = 18.75ms required for VCXO stabilization
157 #endif
158 #else
159 #define SETUP_SLICER 180 // The setup_slicer is the time that the vtcxo takes to deliver
160 // a stable output when vtcxo is enabled : usually 2 to 5ms
161 // The SETUP_SLICER value should be smaller than 160(=4,8ms) but this
162 // parameter is directly related to the VTCXO device used in the phone
163 // and consequently must be retrieved from the VTCXO data-sheet.
164 #endif
165
166 #define SETUP_CLK13 31 // The setup_clk13 is time that the slicer takes to deliver
167 // a stable output when slicer is enabled : max conservative value 1ms
168
169 #endif // BOARD == 34
170
171 // SETUP_FRAME:
172 //-------------
173 // CF. Reference document: ULYS015 v1.1 page 24
174 // 1) Nominal Frequency = 32.768 Khz => 0.03051757 ms
175 // (0.03051757 ms / 4.615 ms) = 0.006612692 Frames
176 // 2) The use of the RFEN signal is optional. It is necessary if the VTCXO function
177 // is part of an RF IC which must be first powered before enabling the VTCXO.
178 // However it can be use for any other purpose.
179 // 3) The term (1-DBL_EPSILON) corresponds to the rounding up of SETUP_FRAME.
180 #ifndef DBL_EPSILON //CQ16723: For non TI compiler, DBL_EPSILON can be undefined.
181 #define DBL_EPSILON 0
182 #endif
183
184 #define SETUP_FRAME ((( SETUP_RF+SETUP_VTCXO+SETUP_SLICER+SETUP_CLK13)*0.006612692)+(1-DBL_EPSILON))
185
186 #define MAX_GSM_TIMER 65535 // max duration for the wake up timer
187
188
189 // Default values for Cell selection and CS_MODE0
190 //===============================================
191 #define DEFAULT_HFMHZ_VALUE (13000000*l1_config.dpll)
192 #define DEFAULT_32KHZ_VALUE (32768) // real value 32768.29038 hz
193 //with l1ctl_pgm_clk32(DEFAULT_HFMHZ_VALUE,DEFAULT_32KHZ_VALUE) and dpll = 65Mhz
194 // => DEFAULT_INCSIXTEEN 132
195 // => DEFAULT_INCFRAC 15915
196
197
198
199
200
201 // ULPD GSM timer control register description
202 //============================================
203
204 #define ULPD_TM_LOAD 0x0001 // load the timer with init value
205 #define ULPD_TM_FREEZE 0x0002 // 1=> GSM timer is frozen
206 #define ULPD_IT_TIMER_GSM 0x0001 // Interrupt timer occurrence
207
208 /* TI's dyslexia */
209 #define ULDP_TM_LOAD ULPD_TM_LOAD
210 #define ULDP_TM_FREEZE ULPD_TM_FREEZE
211
212 /*
213 * The following accessor macros all have dyslexic names, unfortunately.
214 * Too much of a pita to rename them all, so I'm leaving them be for now.
215 * -SF
216 */
217
218 // ULDP_INCFRAC_UPDATE : update INCFRAC (16 bits)
219 //================================================
220 #define ULDP_INCFRAC_UPDATE(frac) (* (volatile SYS_UWORD16 *)ULPD_INC_FRAC_REG = frac)
221
222
223 // ULDP_INCSIXTEEN_UPDATE : update INCSIXTEEN (12 bits)
224 //======================================================
225 #define ULDP_INCSIXTEEN_UPDATE(inc) (* (volatile SYS_UWORD16 *)ULDP_INC_SIXTEENTH_REG = inc)
226
227
228 // ULDP_GAUGING_RUN : Start the gauging
229 //=====================================
230 #define ULDP_GAUGING_RUN (* (volatile SYS_UWORD16 *)ULDP_GAUGING_CTRL_REG |= ULDP_GAUGING_EN)
231
232
233 // ULDP_GAUGING_STATUS : Return if it gauging occurence
234 //======================================================
235 #define ULDP_GAUGING_STATUS ((* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_GAUGING_EN )
236
237 // ULDP_GAUGING_STOP : Stop the gauging
238 //=====================================
239 #define ULDP_GAUGING_STOP (* (volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG &= ~ULDP_GAUGING_EN)
240
241 // ULDP_GAUGING_START : Stop the gauging
242 //=====================================
243 #define ULDP_GAUGING_START (* (volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG |= ULDP_GAUGING_EN)
244
245 // ULDP_GAUGING_SET_HF : Set the gauging versus HF clock
246 //======================================================
247 #define ULDP_GAUGING_SET_HF (* (volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG |= ULDP_GAUGING_TYPE_HF)
248
249 // ULDP_GAUGING_HF_PLL : Set the gauging HF versus PLL clock
250 //===========================================================
251 #define ULDP_GAUGING_HF_PLL (* (volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG |= ULDP_SEL_HF_PLL)
252
253
254 // ULDP_GET_IT_GAG : Return if the interrupt it gauging occurence
255 //================================================================
256 #define ULDP_GET_IT_GAG ((* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_IT_GAUGING )
257
258 // ULDP_GET_OVF_HF : Return overflow occured on the HF counter
259 //=============================================================
260 #define ULDP_GET_OVF_HF (((* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_OVF_HF)>>1)
261
262 // ULDP_GET_OVF_32 : Return overflow occured on the 32 counter
263 //=============================================================
264 #define ULDP_GET_OVF_32 (((* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_OVF_32)>>2)
265
266 // ULDP_TIMER_INIT : Load the timer_init value
267 //=========================================================
268 #define ULDP_TIMER_INIT(value) ((* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_INIT_REG) = value)
269
270 // READ_ULDP_TIMER_INIT : Read the timer_init value
271 //=========================================================
272 #define READ_ULDP_TIMER_INIT (* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_INIT_REG)
273
274 // READ_ULDP_TIMER_VALUE : Read the timer_init value
275 //=========================================================
276 #define READ_ULDP_TIMER_VALUE (* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_VALUE_REG)
277
278 // ULDP_TIMER_LD : Load the timer with timer_init value
279 //=========================================================
280 #define ULDP_TIMER_LD ((* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_CTRL_REG) |= ULDP_TM_LOAD)
281
282 // ULDP_TIMER_FREEZE : Freeze the timer
283 //=========================================================
284 #define ULDP_TIMER_FREEZE ((* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_CTRL_REG) |= ULDP_TM_FREEZE)
285
286 // ULDP_GSM_TIME_START : Run the GSM timer
287 //=========================================
288 #define ULDP_TIMER_START ((* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_CTRL_REG) &= ~ULDP_TM_FREEZE)
289
290 // ULDP_GET_IT_TIMER : Return the it GSM timer occurence
291 //===========================================================
292 #define ULDP_GET_IT_TIMER ((* (volatile SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM )
293
294