FreeCalypso > hg > freecalypso-sw
annotate loadtools/scripts/pirelli.init @ 992:a7b0b426f9ca
target-utils: boot ROM UART autodetection revamped
The new implementation should work with both the familiar Calypso C035
boot ROM version found in our regular targets as well as the older
Calypso F741979B version found on the vintage D-Sample board.
author | Mychaela Falconia <falcon@ivan.Harhan.ORG> |
---|---|
date | Wed, 30 Dec 2015 21:28:41 +0000 |
parents | 5b53cad88637 |
children |
rev | line source |
---|---|
18
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1 # This phone has 3 memory chip selects: |
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
2 # |
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
3 # nCS0: flash chip select 1 |
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
4 # nCS1: RAM chip select |
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
5 # nCS3: flash chip select 2 |
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
6 # |
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
7 # All 3 chip select lines go to the same physical IC, a RAM/flash MCP. |
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
8 # We set WS=4 for all 3 here, copying what OsmocomBB does. The access |
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
9 # time listed in the datasheet is 70 ns for both RAM and flash, and per |
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
10 # my math setting WS=3 *might* work, but it could be marginal, so let's |
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
11 # play it safe for now. |
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
12 |
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
13 w16 fffffb00 00A4 |
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
14 w16 fffffb02 00A4 |
fa3e9a5665bd
loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
15 w16 fffffb06 00A4 |
32
9a77b3395747
Pirelli ADD22 configuration
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
18
diff
changeset
|
16 |
9a77b3395747
Pirelli ADD22 configuration
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
18
diff
changeset
|
17 # We also need to switch the CS4/ADD22 pin from its default function |
9a77b3395747
Pirelli ADD22 configuration
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
18
diff
changeset
|
18 # of CS4 to the needed ADD22. |
9a77b3395747
Pirelli ADD22 configuration
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
18
diff
changeset
|
19 |
9a77b3395747
Pirelli ADD22 configuration
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
18
diff
changeset
|
20 w16 fffef006 0008 |
140
5b53cad88637
pirelli.init: go ahead and switch to 812500 baud automatically
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
32
diff
changeset
|
21 |
5b53cad88637
pirelli.init: go ahead and switch to 812500 baud automatically
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
32
diff
changeset
|
22 # With this phone all Calypso serial access always goes through the |
5b53cad88637
pirelli.init: go ahead and switch to 812500 baud automatically
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
32
diff
changeset
|
23 # CP2102 usb2serial IC inside the phone itself, which is programmed |
5b53cad88637
pirelli.init: go ahead and switch to 812500 baud automatically
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
32
diff
changeset
|
24 # to support the high non-standard baud rates. So we can safely |
5b53cad88637
pirelli.init: go ahead and switch to 812500 baud automatically
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
32
diff
changeset
|
25 # switch to 812500 baud unconditionally. |
5b53cad88637
pirelli.init: go ahead and switch to 812500 baud automatically
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
32
diff
changeset
|
26 |
5b53cad88637
pirelli.init: go ahead and switch to 812500 baud automatically
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
32
diff
changeset
|
27 baud 812500 |