FreeCalypso > hg > freecalypso-citrine
comparison L1/include/l1_const.h @ 3:f93dab57b032
L1/include: TCS211-based version restored
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 09 Jun 2016 00:45:00 +0000 |
parents | 75a11d740a02 |
children |
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2:7c13c26f1aa4 | 3:f93dab57b032 |
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4 * | 4 * |
5 * Filename l1_const.h | 5 * Filename l1_const.h |
6 * Copyright 2003 (C) Texas Instruments | 6 * Copyright 2003 (C) Texas Instruments |
7 * | 7 * |
8 ************* Revision Controle System Header *************/ | 8 ************* Revision Controle System Header *************/ |
9 #ifndef L1_CONST_H | |
10 #define L1_CONST_H | |
11 | 9 |
12 #ifdef __MSDOS__ // Running BORLANDC compiler. | 10 #ifdef __MSDOS__ // Running BORLANDC compiler. |
13 #ifdef MVC | 11 #ifdef MVC |
14 #define EXIT exit(0) | 12 #define EXIT exit(0) |
15 #define FAR | 13 #define FAR |
57 #define GSM_SCHEDULER 2 // Select GSM scheduler | 55 #define GSM_SCHEDULER 2 // Select GSM scheduler |
58 | 56 |
59 //----------------------------- | 57 //----------------------------- |
60 // POWER MANAGEMENT............ | 58 // POWER MANAGEMENT............ |
61 //----------------------------- | 59 //----------------------------- |
62 #define MIN_SLEEP_TIME (SETUP_FRAME+2+l1_config.params.rf_wakeup_tpu_scenario_duration) //HW WAKE-UP+MIN_SLEEP(2)+AFC RESTORE(rf_wakeup_tpu_scenario_duration) | 60 #define MIN_SLEEP_TIME (SETUP_FRAME+2+l1_config.params.setup_afc_and_rf) //HW WAKE-UP+MIN_SLEEP(2)+AFC RESTORE(2) |
63 #define TPU_LOAD 01 | 61 #define TPU_LOAD 01 |
64 #define TPU_FREEZE 02 | 62 #define TPU_FREEZE 02 |
65 | 63 |
66 // SLEEP ALGO SWITCH | 64 // SLEEP ALGO SWITCH |
67 #define NO_SLEEP 00 // ------ + ------ + ------ | 65 #define NO_SLEEP 00 // ------ + ------ + ------ |
73 // GAUGING SAMPLES | 71 // GAUGING SAMPLES |
74 #define SIZE_HIST 10 | 72 #define SIZE_HIST 10 |
75 #define MAX_BAD_GAUGING 3 | 73 #define MAX_BAD_GAUGING 3 |
76 | 74 |
77 // GAUG_IN_32T = (HF in clock of 13Mhz*dpll) * ( LF in Khz) | 75 // GAUG_IN_32T = (HF in clock of 13Mhz*dpll) * ( LF in Khz) |
78 // Leonardo version had it set to 1348, but TCS3.2 (LoCosto) has it set | |
79 // to 605 instead. I'll revert it to the Leonardo value for now. | |
80 // -- Space Falcon | |
81 #define GAUG_IN_32T 1348 // gauging duration is 1348*T32 measured on eva4 | 76 #define GAUG_IN_32T 1348 // gauging duration is 1348*T32 measured on eva4 |
82 | 77 |
83 // DSP state need to be used to enter Deep Sleep mode | 78 // DSP state need to be used to enter Deep Sleep mode |
84 #if (W_A_DSP_IDLE3 == 1) | 79 #if (W_A_DSP_IDLE3 == 1) |
85 #define C_DSP_IDLE3 3 | 80 #define C_DSP_IDLE3 3 |
157 | 152 |
158 #define A_D_BLEN 456 // SACCH/SDCCH data block length (GSM 5.01 $7) | 153 #define A_D_BLEN 456 // SACCH/SDCCH data block length (GSM 5.01 $7) |
159 #define TCH_FS_BLEN 378 // TCH FULL SPEECH block length | 154 #define TCH_FS_BLEN 378 // TCH FULL SPEECH block length |
160 #define TCH_HS_BLEN 211 // TCH HALF SPEECH block length | 155 #define TCH_HS_BLEN 211 // TCH HALF SPEECH block length |
161 #define TCH_F_D_BLEN 456 // FACCH, TCH_DATA block length | 156 #define TCH_F_D_BLEN 456 // FACCH, TCH_DATA block length |
157 | |
158 /* | |
159 * FreeCalypso Frankenstein: the following definition was not present in | |
160 * our TCS211 version and we had to pull it from the LoCosto version for | |
161 * l1_cmplx.c to compile. However, the comment in the place where it is | |
162 * used says that it "valuable for code running on target with DSP 3606." | |
163 */ | |
162 #define MIN_ACCEPTABLE_SNR_FOR_SB 200 // threshold under which a SB shall be considered as not found | 164 #define MIN_ACCEPTABLE_SNR_FOR_SB 200 // threshold under which a SB shall be considered as not found |
163 | 165 |
164 // Define max PM/TDMA according to DSP code and TPU RAM size | 166 // Define max PM/TDMA according to DSP code and TPU RAM size |
165 //---------------------------------------------------------- | 167 //---------------------------------------------------------- |
166 | 168 |
171 // TPU RAM size limitation | 173 // TPU RAM size limitation |
172 | 174 |
173 #define NB_MEAS_MAX 4 | 175 #define NB_MEAS_MAX 4 |
174 #define NB_MEAS_MAX_GPRS 4 | 176 #define NB_MEAS_MAX_GPRS 4 |
175 | 177 |
176 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15)) | 178 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) |
177 | 179 |
178 #if (DSP >= 33) | 180 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) |
179 | 181 |
180 // DSP code 33: upto 8 PMs with GSM and GPRS scheduler | 182 // DSP code 33: upto 8 PMs with GSM and GPRS scheduler |
181 | 183 |
182 #define NB_MEAS_MAX 8 | 184 #define NB_MEAS_MAX 8 |
183 #define NB_MEAS_MAX_GPRS 8 | 185 #define NB_MEAS_MAX_GPRS 8 |
215 #define TCH_AHS_4_75_BLEN 212 // TCH AHS 4.75 Speech block length | 217 #define TCH_AHS_4_75_BLEN 212 // TCH AHS 4.75 Speech block length |
216 #endif | 218 #endif |
217 //---------------------------------------- | 219 //---------------------------------------- |
218 // LAYER 1 Asynchronous processes names... | 220 // LAYER 1 Asynchronous processes names... |
219 //---------------------------------------- | 221 //---------------------------------------- |
220 #define NBR_L1A_PROCESSES 63 | 222 #if (TESTMODE) && !(L1_GPRS) |
221 | 223 #if (AUDIO_TASK == 1) |
222 #define FULL_MEAS 0 // l1a_full_list_meas_process(msg) | 224 #if (L1_GTT) |
223 #define CS_NORM 1 // l1a_cs_bcch_process(msg) | 225 #if (OP_L1_STANDALONE == 1) |
224 #define I_6MP 2 // l1a_idle_6strongest_monitoring_process(msg) | 226 #define NBR_L1A_PROCESSES 45 |
225 #define I_SCP 3 // l1a_idle_serving_cell_paging_process(msg) | 227 #else |
226 #define I_SCB 4 // l1a_idle_serving_cell_bcch_reading_process(msg) | 228 #define NBR_L1A_PROCESSES 44 |
227 #define I_SMSCB 5 // l1a_idle_smscb_process(msg) | 229 #endif |
228 #define CR_B 6 // l1a_cres_process(msg) | 230 #else |
229 #define ACCESS 7 // l1a_access_process(msg) | 231 #if (OP_L1_STANDALONE == 1) |
230 #define DEDICATED 8 // l1a_dedicated_process(msg) | 232 #define NBR_L1A_PROCESSES 44 |
231 #define I_FULL_MEAS 9 // l1a_dedicated_process(msg) | 233 #else |
232 #define I_NMEAS 10 // l1a_idle_ba_meas_process(msg) | 234 #define NBR_L1A_PROCESSES 43 |
233 #define DEDIC_6 11 // l1a_dedic6_process(msg) | 235 #endif |
234 #define D_NMEAS 12 // l1a_dedic_ba_list_meas_process(msg) | 236 #endif |
235 #define HW_TEST 13 // l1a_test_process(msg) | 237 #else |
236 #define I_BCCHN 14 // l1a_idle_neighbour_cell_bcch_reading_process(msg) | 238 #if (L1_GTT) |
237 #define I_ADC 15 // l1a_mmi_adc_req(msg) | 239 #if (OP_L1_STANDALONE == 1) |
238 #define TMODE_FB0 16 // l1a_tmode_fb0_process(msg) | 240 #define NBR_L1A_PROCESSES 27 |
239 #define TMODE_FB1 17 // l1a_tmode_fb1_process(msg) | 241 #else |
240 #define TMODE_SB 18 // l1a_tmode_sb_process(msg) | 242 #define NBR_L1A_PROCESSES 26 |
241 #define TMODE_BCCH 19 // l1a_tmode_bcch_reading_process(msg) | 243 #endif |
242 #define TMODE_RA 20 // l1a_tmode_access_process(msg) | 244 #else |
243 #define TMODE_DEDICATED 21 // l1a_tmode_dedicated_process(msg) | 245 #if (OP_L1_STANDALONE == 1) |
244 #define TMODE_FULL_MEAS 22 // l1a_tmode_full_list_meas_process(msg) | 246 #define NBR_L1A_PROCESSES 26 |
245 #define TMODE_PM 23 // l1a_tmode_meas_process(msg) | 247 #else |
246 #define TMODE_TRANSFER 24 // l1a_tmode_transfer_process(msg) | 248 #define NBR_L1A_PROCESSES 25 |
247 #define L1A_KEYBEEP_STATE 25 // l1a_mmi_keybeep_process(msg) | 249 #endif |
248 #define L1A_TONE_STATE 26 // l1a_mmi_tone_process(msg) | 250 #endif |
249 #define L1A_MELODY0_STATE 27 // l1a_mmi_melody0_process(msg) | 251 #endif |
250 #define L1A_MELODY1_STATE 28 // l1a_mmi_melody1_process(msg) | 252 #endif |
251 #define L1A_VM_PLAY_STATE 29 // l1a_mmi_vm_playing_process(msg) | 253 |
252 #define L1A_VM_RECORD_STATE 30 // l1a_mmi_vm_recording_process(msg) | 254 #if (TESTMODE) && (L1_GPRS) |
253 #define L1A_SR_ENROLL_STATE 31 // l1a_mmi_sr_enroll_process(msg) | 255 #if (AUDIO_TASK == 1) |
254 #define L1A_SR_UPDATE_STATE 32 // l1a_mmi_sr_update_process(msg) | 256 #if (L1_GTT) |
255 #define L1A_SR_RECO_STATE 33 // l1a_mmi_sr_reco_process(msg) | 257 #if (OP_L1_STANDALONE == 1) |
256 #define L1A_SR_UPDATE_CHECK_STATE 34 // l1a_mmi_sr_update_check_process(msg) | 258 #define NBR_L1A_PROCESSES 46 |
257 #define L1A_AEC_STATE 35 // l1a_mmi_aec_process(msg) | 259 #else |
258 #define L1A_FIR_STATE 36 // l1a_mmi_fir_process(msg) | 260 #define NBR_L1A_PROCESSES 45 |
259 #define L1A_AUDIO_MODE_STATE 37 // l1a_mmi_audio_mode_process(msg) | 261 #endif |
260 #define L1A_MELODY0_E2_STATE 38 // l1a_mmi_melody0_e2_process(msg) | 262 #else |
261 #define L1A_MELODY1_E2_STATE 39 // l1a_mmi_melody1_e2_process(msg) | 263 #if (OP_L1_STANDALONE == 1) |
262 #define L1A_VM_AMR_PLAY_STATE 40 // l1a_mmi_vm_amr_playing_process(msg) | 264 #define NBR_L1A_PROCESSES 45 |
263 #define L1A_VM_AMR_RECORD_STATE 41 // l1a_mmi_vm_amr_recording_process(msg) | 265 #else |
264 #define L1A_CPORT_STATE 42 // l1a_mmi_cport_process(msg) | 266 #define NBR_L1A_PROCESSES 44 |
265 #define L1A_AUDIO_ONOFF_STATE 43 // l1a_mmi_audio_onoff_process(msg) | 267 #endif |
266 #define L1A_GTT_STATE 44 // l1a_mmi_gtt_process(msg) | 268 #endif |
267 #define INIT_L1 45 // l1a_init_layer1_process(msg) | 269 #else |
268 #define HSW_CONF 46 // l1a_test_config_process(msg) | 270 #if (L1_GTT) |
269 #define L1A_MP3_STATE 47 // l1a_mmi_mp3_process(msg) | 271 #if (OP_L1_STANDALONE == 1) |
270 #define TMODE_AUDIO_STEREOPATH_DRV_STATE 48 // l1a_tmode_audio_stereopath_process(msg) | 272 #define NBR_L1A_PROCESSES 28 |
271 #define L1A_EXT_AUDIO_MGT_STATE 49 // l1a_mmi_ext_audio_mgt_process(msg) | 273 #else |
272 #define L1A_ANR_STATE 50 // l1a_mmi_anr_process(msg) | 274 #define NBR_L1A_PROCESSES 27 |
273 #define L1A_IIR_STATE 51 // l1a_mmi_iir_process(msg) | 275 #endif |
274 #define L1A_LIMITER_STATE 52 // l1a_mmi_limiter_process(msg) | 276 #else |
275 #define L1A_ES_STATE 53 // l1a_mmi_es_process(msg) | 277 #if (OP_L1_STANDALONE == 1) |
276 #define L1A_MIDI_STATE 54 // l1a_mmi_midi_process(msg) | 278 #define NBR_L1A_PROCESSES 27 |
277 #define L1A_AGC_UL_STATE 55 // l1a_mmi_agc_ul_process(msg) | 279 #else |
278 #define L1A_AGC_DL_STATE 56 // l1a_mmi_agc_dl_process(msg) | 280 #define NBR_L1A_PROCESSES 26 |
279 #define L1A_DRC_STATE 57 // l1a_mmi_drc_process(msg) | 281 #endif |
280 #define L1A_WCM_STATE 58 // l1a_mmi_wcm_process(msg) | 282 #endif |
281 #define L1A_AAC_STATE 59 // l1a_mmi_aac_process(msg) | 283 #endif |
282 #if (L1_VOCODER_IF_CHANGE == 1) | 284 #endif |
283 #define L1A_VOCODER_CFG_STATE 60 // l1a_mmi_vocoder_cfg_process | 285 |
284 #endif | 286 #if !(TESTMODE) |
285 #if (L1_PCM_EXTRACTION) | 287 #if (AUDIO_TASK == 1) |
286 #define L1A_PCM_DOWNLOAD_STATE 61 | 288 #if (L1_GTT) |
287 #define L1A_PCM_UPLOAD_STATE 62 | 289 #if (OP_L1_STANDALONE == 1) |
288 #endif | 290 #define NBR_L1A_PROCESSES 37 |
289 | 291 #else |
292 #define NBR_L1A_PROCESSES 36 | |
293 #endif | |
294 #else | |
295 #if (OP_L1_STANDALONE == 1) | |
296 #define NBR_L1A_PROCESSES 36 | |
297 #else | |
298 #define NBR_L1A_PROCESSES 35 | |
299 #endif | |
300 #endif | |
301 #else | |
302 #if (L1_GTT) | |
303 #if (OP_L1_STANDALONE == 1) | |
304 #define NBR_L1A_PROCESSES 19 | |
305 #else | |
306 #define NBR_L1A_PROCESSES 18 | |
307 #endif | |
308 #else | |
309 #if (OP_L1_STANDALONE == 1) | |
310 #define NBR_L1A_PROCESSES 18 | |
311 #else | |
312 #define NBR_L1A_PROCESSES 17 | |
313 #endif | |
314 #endif | |
315 #endif | |
316 #endif | |
317 | |
318 | |
319 #define FULL_MEAS 0 // l1a_full_list_meas_process(msg) | |
320 #define CS_NORM 1 // l1a_cs_bcch_process(msg) | |
321 #define I_6MP 2 // l1a_idle_6strongest_monitoring_process(msg) | |
322 #define I_SCP 3 // l1a_idle_serving_cell_paging_process(msg) | |
323 #define I_SCB 4 // l1a_idle_serving_cell_bcch_reading_process(msg) | |
324 #define I_SMSCB 5 // l1a_idle_smscb_process(msg) | |
325 #define CR_B 6 // l1a_cres_process(msg) | |
326 #define ACCESS 7 // l1a_access_process(msg) | |
327 #define DEDICATED 8 // l1a_dedicated_process(msg) | |
328 #define I_FULL_MEAS 9 // l1a_dedicated_process(msg) | |
329 #define I_NMEAS 10 // l1a_idle_ba_meas_process(msg) | |
330 #define DEDIC_6 11 // l1a_dedic6_process(msg) | |
331 #define D_NMEAS 12 // l1a_dedic_ba_list_meas_process(msg) | |
332 #define HW_TEST 13 // l1a_test_process(msg) | |
333 #define I_BCCHN 14 // l1a_idle_neighbour_cell_bcch_reading_process(msg) | |
334 #define I_ADC 15 // l1a_mmi_adc_req(msg) | |
335 | |
336 #if (TESTMODE) && !(L1_GPRS) | |
337 #define TMODE_FB0 16 // l1a_tmode_fb0_process(msg) | |
338 #define TMODE_FB1 17 // l1a_tmode_fb1_process(msg) | |
339 #define TMODE_SB 18 // l1a_tmode_sb_process(msg) | |
340 #define TMODE_BCCH 19 // l1a_tmode_bcch_reading_process(msg) | |
341 #define TMODE_RA 20 // l1a_tmode_access_process(msg) | |
342 #define TMODE_DEDICATED 21 // l1a_tmode_dedicated_process(msg) | |
343 #define TMODE_FULL_MEAS 22 // l1a_tmode_full_list_meas_process(msg) | |
344 #define TMODE_PM 23 // l1a_tmode_meas_process(msg) | |
345 #if (AUDIO_TASK == 1) | |
346 #define L1A_KEYBEEP_STATE 24 // l1a_mmi_keybeep_process(msg) | |
347 #define L1A_TONE_STATE 25 // l1a_mmi_tone_process(msg) | |
348 #define L1A_MELODY0_STATE 26 // l1a_mmi_melody0_process(msg) | |
349 #define L1A_MELODY1_STATE 27 // l1a_mmi_melody1_process(msg) | |
350 #define L1A_VM_PLAY_STATE 28 // l1a_mmi_vm_playing_process(msg) | |
351 #define L1A_VM_RECORD_STATE 29 // l1a_mmi_vm_recording_process(msg) | |
352 #define L1A_SR_ENROLL_STATE 30 // l1a_mmi_sr_enroll_process(msg) | |
353 #define L1A_SR_UPDATE_STATE 31 // l1a_mmi_sr_update_process(msg) | |
354 #define L1A_SR_RECO_STATE 32 // l1a_mmi_sr_reco_process(msg) | |
355 #define L1A_SR_UPDATE_CHECK_STATE 33 // l1a_mmi_sr_update_check_process(msg) | |
356 #define L1A_AEC_STATE 34 // l1a_mmi_aec_process(msg) | |
357 #define L1A_FIR_STATE 35 // l1a_mmi_fir_process(msg) | |
358 #define L1A_AUDIO_MODE_STATE 36 // l1a_mmi_audio_mode_process(msg) | |
359 #define L1A_MELODY0_E2_STATE 37 // l1a_mmi_melody0_e2_process(msg) | |
360 #define L1A_MELODY1_E2_STATE 38 // l1a_mmi_melody1_e2_process(msg) | |
361 #define L1A_VM_AMR_PLAY_STATE 39 // l1a_mmi_vm_amr_playing_process(msg) | |
362 #define L1A_VM_AMR_RECORD_STATE 40 // l1a_mmi_vm_amr_recording_process(msg) | |
363 #define L1A_CPORT_STATE 41 // l1a_mmi_cport_process(msg) | |
364 #if (L1_GTT == 1) | |
365 #define L1A_GTT_STATE 42 // l1a_mmi_gtt_process(msg) | |
366 #define INIT_L1 43 // l1a_init_layer1_process(msg) | |
367 #if (OP_L1_STANDALONE == 1) | |
368 #define HSW_CONF 44 // l1a_test_config_process(msg) | |
369 #endif | |
370 #else | |
371 #define INIT_L1 42 // l1a_init_layer1_process(msg) | |
372 #if (OP_L1_STANDALONE == 1) | |
373 #define HSW_CONF 43 // l1a_test_config_process(msg) | |
374 #endif | |
375 #endif | |
376 #else | |
377 #if (L1_GTT == 1) | |
378 #define L1A_GTT_STATE 24 // l1a_mmi_gtt_process(msg) | |
379 #define INIT_L1 25 // l1a_init_layer1_process(msg) | |
380 #if (OP_L1_STANDALONE == 1) | |
381 #define HSW_CONF 26 // l1a_test_config_process(msg) | |
382 #endif | |
383 #else | |
384 #define INIT_L1 24 // l1a_init_layer1_process(msg) | |
385 #if (OP_L1_STANDALONE == 1) | |
386 #define HSW_CONF 25 // l1a_test_config_process(msg) | |
387 #endif | |
388 #endif | |
389 #endif | |
390 #endif | |
391 | |
392 #if (TESTMODE) && (L1_GPRS) | |
393 #define TMODE_FB0 16 // l1a_tmode_fb0_process(msg) | |
394 #define TMODE_FB1 17 // l1a_tmode_fb1_process(msg) | |
395 #define TMODE_SB 18 // l1a_tmode_sb_process(msg) | |
396 #define TMODE_BCCH 19 // l1a_tmode_bcch_reading_process(msg) | |
397 #define TMODE_RA 20 // l1a_tmode_access_process(msg) | |
398 #define TMODE_DEDICATED 21 // l1a_tmode_dedicated_process(msg) | |
399 #define TMODE_FULL_MEAS 22 // l1a_tmode_full_list_meas_process(msg) | |
400 #define TMODE_PM 23 // l1a_tmode_meas_process(msg) | |
401 #define TMODE_TRANSFER 24 // l1a_tmode_transfer_process(msg) | |
402 #if (AUDIO_TASK == 1) | |
403 #define L1A_KEYBEEP_STATE 25 // l1a_mmi_keybeep_process(msg) | |
404 #define L1A_TONE_STATE 26 // l1a_mmi_tone_process(msg) | |
405 #define L1A_MELODY0_STATE 27 // l1a_mmi_melody0_process(msg) | |
406 #define L1A_MELODY1_STATE 28 // l1a_mmi_melody1_process(msg) | |
407 #define L1A_VM_PLAY_STATE 29 // l1a_mmi_vm_playing_process(msg) | |
408 #define L1A_VM_RECORD_STATE 30 // l1a_mmi_vm_recording_process(msg) | |
409 #define L1A_SR_ENROLL_STATE 31 // l1a_mmi_sr_enroll_process(msg) | |
410 #define L1A_SR_UPDATE_STATE 32 // l1a_mmi_sr_update_process(msg) | |
411 #define L1A_SR_RECO_STATE 33 // l1a_mmi_sr_reco_process(msg) | |
412 #define L1A_SR_UPDATE_CHECK_STATE 34 // l1a_mmi_sr_update_check_process(msg) | |
413 #define L1A_AEC_STATE 35 // l1a_mmi_aec_process(msg) | |
414 #define L1A_FIR_STATE 36 // l1a_mmi_fir_process(msg) | |
415 #define L1A_AUDIO_MODE_STATE 37 // l1a_mmi_audio_mode_process(msg) | |
416 #define L1A_MELODY0_E2_STATE 38 // l1a_mmi_melody0_e2_process(msg) | |
417 #define L1A_MELODY1_E2_STATE 39 // l1a_mmi_melody1_e2_process(msg) | |
418 #define L1A_VM_AMR_PLAY_STATE 40 // l1a_mmi_vm_amr_playing_process(msg) | |
419 #define L1A_VM_AMR_RECORD_STATE 41 // l1a_mmi_vm_amr_recording_process(msg) | |
420 #define L1A_CPORT_STATE 42 // l1a_mmi_cport_process(msg) | |
421 #if (L1_GTT == 1) | |
422 #define L1A_GTT_STATE 43 | |
423 #define INIT_L1 44 // l1a_init_layer1_process(msg) | |
424 #if (OP_L1_STANDALONE == 1) | |
425 #define HSW_CONF 45 // l1a_test_config_process(msg) | |
426 #endif | |
427 #else | |
428 #define INIT_L1 43 // l1a_init_layer1_process(msg) | |
429 #if (OP_L1_STANDALONE == 1) | |
430 #define HSW_CONF 44 // l1a_test_config_process(msg) | |
431 #endif | |
432 #endif | |
433 #else | |
434 #if (L1_GTT == 1) | |
435 #define L1A_GTT_STATE 25 | |
436 #define INIT_L1 26 // l1a_init_layer1_process(msg) | |
437 #if (OP_L1_STANDALONE == 1) | |
438 #define HSW_CONF 27 // l1a_test_config_process(msg) | |
439 #endif | |
440 #else | |
441 #define INIT_L1 25 // l1a_init_layer1_process(msg) | |
442 #if (OP_L1_STANDALONE == 1) | |
443 #define HSW_CONF 26 // l1a_test_config_process(msg) | |
444 #endif | |
445 #endif | |
446 #endif | |
447 #endif | |
448 | |
449 #if !(TESTMODE) && (AUDIO_TASK == 1) | |
450 #define L1A_KEYBEEP_STATE 16 // l1a_mmi_keybeep_process(msg) | |
451 #define L1A_TONE_STATE 17 // l1a_mmi_tone_process(msg) | |
452 #define L1A_MELODY0_STATE 18 // l1a_mmi_melody0_process(msg) | |
453 #define L1A_MELODY1_STATE 19 // l1a_mmi_melody1_process(msg) | |
454 #define L1A_VM_PLAY_STATE 20 // l1a_mmi_vm_playing_process(msg) | |
455 #define L1A_VM_RECORD_STATE 21 // l1a_mmi_vm_recording_process(msg) | |
456 #define L1A_SR_ENROLL_STATE 22 // l1a_mmi_sr_enroll_process(msg) | |
457 #define L1A_SR_UPDATE_STATE 23 // l1a_mmi_sr_update_process(msg) | |
458 #define L1A_SR_RECO_STATE 24 // l1a_mmi_sr_reco_process(msg) | |
459 #define L1A_SR_UPDATE_CHECK_STATE 25 // l1a_mmi_sr_update_check_process(msg) | |
460 #define L1A_AEC_STATE 26 // l1a_mmi_aec_process(msg) | |
461 #define L1A_FIR_STATE 27 // l1a_mmi_fir_process(msg) | |
462 #define L1A_AUDIO_MODE_STATE 28 // l1a_mmi_audio_mode_process(msg) | |
463 #define L1A_MELODY0_E2_STATE 29 // l1a_mmi_melody0_e2_process(msg) | |
464 #define L1A_MELODY1_E2_STATE 30 // l1a_mmi_melody1_e2_process(msg) | |
465 #define L1A_VM_AMR_PLAY_STATE 31 // l1a_mmi_vm_amr_playing_process(msg) | |
466 #define L1A_VM_AMR_RECORD_STATE 32 // l1a_mmi_vm_amr_recording_process(msg) | |
467 #define L1A_CPORT_STATE 33 // l1a_mmi_cport_process(msg) | |
468 #if (L1_GTT == 1) | |
469 #define L1A_GTT_STATE 34 // l1a_mmi_tty_process(msg) | |
470 #define INIT_L1 35 // l1a_init_layer1_process(msg) | |
471 #if (OP_L1_STANDALONE == 1) | |
472 #define HSW_CONF 36 // l1a_test_config_process(msg) | |
473 #endif | |
474 #else | |
475 #define INIT_L1 34 // l1a_init_layer1_process(msg) | |
476 #if (OP_L1_STANDALONE == 1) | |
477 #define HSW_CONF 35 // l1a_test_config_process(msg) | |
478 #endif | |
479 #endif | |
480 #elif !(TESTMODE) && !(AUDIO_TASK == 1) | |
481 #if (L1_GTT == 1) | |
482 #define L1A_GTT_STATE 16 // l1a_mmi_tty_process(msg) | |
483 #define INIT_L1 17 // l1a_init_layer1_process(msg) | |
484 #if (OP_L1_STANDALONE == 1) | |
485 #define HSW_CONF 18 // l1a_test_config_process(msg) | |
486 #endif | |
487 #else | |
488 #define INIT_L1 16 // l1a_init_layer1_process(msg) | |
489 #if (OP_L1_STANDALONE == 1) | |
490 #define HSW_CONF 17 // l1a_test_config_process(msg) | |
491 #endif | |
492 #endif | |
493 #endif | |
290 | 494 |
291 #if TESTMODE | 495 #if TESTMODE |
292 #define TMODE_UPLINK (1<<0) | 496 #define TMODE_UPLINK (1<<0) |
293 #define TMODE_DOWNLINK (1<<1) | 497 #define TMODE_DOWNLINK (1<<1) |
294 #endif | 498 #endif |
305 #define NO_NEW_TASK -1 | 509 #define NO_NEW_TASK -1 |
306 | 510 |
307 | 511 |
308 // Tasks in the order of their priority (low to high). | 512 // Tasks in the order of their priority (low to high). |
309 | 513 |
310 #if (GSM_IDLE_RAM != 0) | |
311 #define INT_RAM_GSM_IDLE_L1S_PROCESSES1 0x00000618 // PNP, PEP, NP, EP only are supported | |
312 #endif | |
313 | |
314 | |
315 #if !L1_GPRS | 514 #if !L1_GPRS |
316 | 515 |
317 #if ((REL99 == 1) && (FF_BHO == 1)) | |
318 #define NBR_DL_L1S_TASKS 33 | |
319 #else //#if ((REL99 == 1) && (FF_BHO == 1)) | |
320 #define NBR_DL_L1S_TASKS 32 | 516 #define NBR_DL_L1S_TASKS 32 |
321 #endif //#if ((REL99 == 1) && (FF_BHO == 1)) | |
322 | 517 |
323 //GSM_TASKS/ | 518 //GSM_TASKS/ |
324 #define HWTEST 0 // DSP checksum reading | 519 #define HWTEST 0 // DSP checksum reading |
325 #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode | 520 #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode |
326 #define DEDIC 2 // Global Dedicated mode switch | 521 #define DEDIC 2 // Global Dedicated mode switch |
350 #define TCHD 26 // Dummy for TCH Half rate | 545 #define TCHD 26 // Dummy for TCH Half rate |
351 #define TCHA 27 // SACCH(TCH) | 546 #define TCHA 27 // SACCH(TCH) |
352 #define TCHTF 28 // TCH Full rate | 547 #define TCHTF 28 // TCH Full rate |
353 #define TCHTH 29 // TCH Half rate | 548 #define TCHTH 29 // TCH Half rate |
354 #define BCCHN_TOP 30 // BCCH Neighbour TOP priority in Idle mode | 549 #define BCCHN_TOP 30 // BCCH Neighbour TOP priority in Idle mode |
355 #if ((REL99 == 1) && (FF_BHO == 1)) | |
356 #define FBSB 31 // Freq + Synchro Burst Reading in Blind Handover | |
357 #define SYNCHRO 32 // synchro task: L1S reset | |
358 #else //#if ((REL99 == 1) && (FF_BHO == 1)) | |
359 #define SYNCHRO 31 // synchro task: L1S reset | 550 #define SYNCHRO 31 // synchro task: L1S reset |
360 #endif //#if ((REL99 == 1) && (FF_BHO == 1)) | |
361 //END_GSM_TASKS/ | 551 //END_GSM_TASKS/ |
362 | 552 |
363 #else | 553 #else |
364 | 554 |
365 #if ((REL99 == 1) && (FF_BHO == 1)) | |
366 #define NBR_DL_L1S_TASKS 46 | |
367 #else //#if ((REL99 == 1) && (FF_BHO == 1)) | |
368 #define NBR_DL_L1S_TASKS 45 | 555 #define NBR_DL_L1S_TASKS 45 |
369 #endif //#if ((REL99 == 1) && (FF_BHO == 1)) | 556 |
370 | |
371 #if (FF_REPEATED_SACCH == 1 ) | |
372 #define REPEATED_SACCH_ENABLE 1 | |
373 #endif /* FF_REPEATED_SACCH */ | |
374 //GPRS_TASKS/ | 557 //GPRS_TASKS/ |
375 #define HWTEST 0 // DSP checksum reading | 558 #define HWTEST 0 // DSP checksum reading |
376 #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode | 559 #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode |
377 #define DEDIC 2 // Global Dedicated mode switch | 560 #define DEDIC 2 // Global Dedicated mode switch |
378 #define RAACC 3 // Channel access (ul) | 561 #define RAACC 3 // Channel access (ul) |
380 #define NSYNC 5 // Global Neighbour cell synchro switch | 563 #define NSYNC 5 // Global Neighbour cell synchro switch |
381 #define POLL 6 // Packet Polling (Access) | 564 #define POLL 6 // Packet Polling (Access) |
382 #define PRACH 7 // Packet Random Access Channel | 565 #define PRACH 7 // Packet Random Access Channel |
383 #define ITMEAS 8 // Interference measurements | 566 #define ITMEAS 8 // Interference measurements |
384 #define FBNEW 9 // Frequency burst search (Idle mode) | 567 #define FBNEW 9 // Frequency burst search (Idle mode) |
385 #define SBCONF 10 // Synchro. burst confirmation | 568 #define SBCONF 10 // Synchro. burst confirmation |
386 #define SB2 11 // Synchro. burst read (1 frame uncertainty / SB position) | 569 #define SB2 11 // Synchro. burst read (1 frame uncertainty / SB position) |
387 #define PTCCH 12 // Packet Timing Advance control channel | 570 #define PTCCH 12 // Packet Timing Advance control channel |
388 #define FB26 13 // Frequency burst search, dedic/transfer mode MF26 or MF52 | 571 #define FB26 13 // Frequency burst search, dedic/transfer mode MF26 or MF52 |
389 #define SB26 14 // Synchro burst search, dedic/transfer mode MF26 or MF52 | 572 #define SB26 14 // Synchro burst search, dedic/transfer mode MF26 or MF52 |
390 #define SBCNF26 15 // Synchro burst confirmation, dedic/transfer mode MF26 or MF52 | 573 #define SBCNF26 15 // Synchro burst confirmation, dedic/transfer mode MF26 or MF52 |
414 #define PBCCHN_IDLE 39 // Packet BCCH Neighbor in Idle mode. | 597 #define PBCCHN_IDLE 39 // Packet BCCH Neighbor in Idle mode. |
415 #define BCCHN_TRAN 40 // BCCH Neighbour in Packet Transfer mode | 598 #define BCCHN_TRAN 40 // BCCH Neighbour in Packet Transfer mode |
416 #define NP 41 // Normal paging Reading | 599 #define NP 41 // Normal paging Reading |
417 #define EP 42 // Extended paging Reading | 600 #define EP 42 // Extended paging Reading |
418 #define BCCHN_TOP 43 // BCCH Neighbour TOP priority in Idle mode | 601 #define BCCHN_TOP 43 // BCCH Neighbour TOP priority in Idle mode |
419 #if ((REL99 == 1) && (FF_BHO == 1)) | |
420 #define FBSB 44 // Freq + Synchro Burst Reading in Blind Handover | |
421 #define SYNCHRO 45 // synchro task: L1S reset | |
422 #else //#if ((REL99 == 1) && (FF_BHO == 1)) | |
423 #define SYNCHRO 44 // synchro task: L1S reset | 602 #define SYNCHRO 44 // synchro task: L1S reset |
424 #endif //#if ((REL99 == 1) && (FF_BHO == 1)) | |
425 //END_GPRS_TASKS/ | 603 //END_GPRS_TASKS/ |
426 | 604 |
427 #endif | |
428 | |
429 #if (GSM_IDLE_RAM != 0) | |
430 #define SIZE_TAB_L1S_MONITOR (((NBR_DL_L1S_TASKS-1) >> 5) + 1) | |
431 #endif | 605 #endif |
432 | 606 |
433 //------------------------------------ | 607 //------------------------------------ |
434 // LAYER 1 API | 608 // LAYER 1 API |
435 //------------------------------------ | 609 //------------------------------------ |
436 #define MCSI_PORT1 0 | 610 #define MCSI_PORT1 0 |
437 #define MCSI_PORT2 1 | 611 #define MCSI_PORT2 1 |
438 | 612 |
439 | 613 |
440 #if (W_A_DSP_PR20037 == 1) | 614 //--------------------------------- |
441 //--------------------------------- | 615 // DSP vocoder Enable/ Disable |
442 // DSP vocoder Enable/ Disable | 616 //--------------------------------- |
443 //--------------------------------- | 617 |
444 #if (FF_L1_TCH_VOCODER_CONTROL == 1) | 618 #if (L1M_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE ==1) |
445 #if (L1_VOCODER_IF_CHANGE == 0) | 619 #if (FF_L1_TCH_VOCODER_CONTROL == 1) |
446 #define TCH_VOCODER_DISABLE_REQ 0 | 620 #define TCH_VOCODER_DISABLE_REQ 0 |
447 #define TCH_VOCODER_ENABLE_REQ 1 | 621 #define TCH_VOCODER_ENABLE_REQ 1 |
448 #define TCH_VOCODER_ENABLED 2 | 622 #define TCH_VOCODER_ENABLED 2 |
449 #define TCH_VOCODER_DISABLED 3 | 623 #define TCH_VOCODER_DISABLED 3 |
450 #else | 624 |
451 #define TCH_VOCODER_RESET_COMMAND 0 | 625 // Number of TDMA wait frames until the DSP output is steady |
452 #define TCH_VOCODER_ENABLE_COMMAND 1 | 626 #define DSP_VOCODER_ON_TRANSITION 165 |
453 #define TCH_VOCODER_DISABLE_COMMAND 2 | 627 #endif // FF_L1_TCH_VOCODER_CONTROL |
454 #endif // L1_VOCODER_IF_CHANGE == 0 | 628 #endif |
455 | |
456 #if (W_A_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE ==1) | |
457 // Number of TDMA wait frames until the DSP output is steady | |
458 #define DSP_VOCODER_ON_TRANSITION 165 | |
459 #endif | |
460 #endif // FF_L1_TCH_VOCODER_CONTROL | |
461 #endif // W_A_DSP_PR20037 | |
462 | |
463 | 629 |
464 //--------------------------------- | 630 //--------------------------------- |
465 // Handover Finished cause defines. | 631 // Handover Finished cause defines. |
466 //--------------------------------- | 632 //--------------------------------- |
467 #define HO_COMPLETE 0 | 633 #define HO_COMPLETE 0 |
468 #define HO_TIMEOUT 1 | 634 #define HO_TIMEOUT 1 |
469 #if ((REL99 == 1) && (FF_BHO == 1)) | |
470 #define HO_FB_FAIL 2 | |
471 #define HO_SB_FAIL 3 | |
472 | |
473 #define NORMAL_HANDOVER 0 | |
474 #define BLIND_HANDOVER 1 | |
475 #endif | |
476 | 635 |
477 //--------------------------------- | 636 //--------------------------------- |
478 // FB detection algorithm defines. | 637 // FB detection algorithm defines. |
479 //--------------------------------- | 638 //--------------------------------- |
480 #define FB_MODE_0 0 // FB detec. mode 0. | 639 #define FB_MODE_0 0 // FB detec. mode 0. |
481 #define FB_MODE_1 1 // FB detec. mode 1. | 640 #define FB_MODE_1 1 // FB detec. mode 1. |
482 | |
483 //--------------------------------- | |
484 // SB acquisition phase. | |
485 //--------------------------------- | |
486 #if ((REL99 == 1) && ((FF_BHO == 1) || (FF_RTD == 1))) | |
487 #define SB_ACQUISITION_PHASE 5 | |
488 #endif | |
489 | 641 |
490 //--------------------------------- | 642 //--------------------------------- |
491 // AFC control defines. | 643 // AFC control defines. |
492 //--------------------------------- | 644 //--------------------------------- |
493 #define AFC_INIT 1 | 645 #define AFC_INIT 1 |
498 #if (VCXO_ALGO) | 650 #if (VCXO_ALGO) |
499 #define AFC_INIT_CENTER 4 | 651 #define AFC_INIT_CENTER 4 |
500 #define AFC_INIT_MAX 5 | 652 #define AFC_INIT_MAX 5 |
501 #define AFC_INIT_MIN 6 | 653 #define AFC_INIT_MIN 6 |
502 #endif | 654 #endif |
503 | |
504 #if 0 | |
505 // For Locosto | |
506 #define L1_AFC_MANUAL_MODE 0 | |
507 #define L1_AFC_SCRIPT_MODE 1 | |
508 #define L1_AFC_NONE 2 | |
509 | |
510 #define L1_CTL_ZERO_IF 2 | |
511 #define L1_CTL_LOW_IF 1 | |
512 | |
513 #define L1_IL_INVALID 0 | |
514 #define L1_IL_VALID 1 | |
515 | |
516 // End Locosto | |
517 #endif | |
518 | |
519 //--------------------------------- | 655 //--------------------------------- |
520 // TOA control defines. | 656 // TOA control defines. |
521 //--------------------------------- | 657 //--------------------------------- |
522 #define TOA_INIT 1 | 658 #define TOA_INIT 1 |
523 #define TOA_RUN 2 | 659 #define TOA_RUN 2 |
524 #if (TOA_ALGO == 2) | |
525 // In this version TOA is refreshed every 2 seconds | |
526 #define L1_TOA_UPDATE_TIME ((UWORD32)(433)) | |
527 #endif | |
528 | 660 |
529 //--------------------------------- | 661 //--------------------------------- |
530 // Neighbour Synchro possible status. | 662 // Neighbour Synchro possible status. |
531 //--------------------------------- | 663 //--------------------------------- |
532 #define NSYNC_FREE 0 | 664 #define NSYNC_FREE 0 |
543 | 675 |
544 #if L1_GPRS | 676 #if L1_GPRS |
545 #define MAX_BLOCK_ID ((UWORD32) (3 * (UWORD32) (MAX_FN / 13))) // Block ID corresponding to fn = FN MAX | 677 #define MAX_BLOCK_ID ((UWORD32) (3 * (UWORD32) (MAX_FN / 13))) // Block ID corresponding to fn = FN MAX |
546 #endif | 678 #endif |
547 | 679 |
548 #if FF_L1_IT_DSP_DTX | |
549 // dtx_status states | |
550 #define DTX_AVAILABLE 0 | |
551 #define DTX_AWAITED 1 | |
552 #define DTX_IT_DSP 2 | |
553 | |
554 // Latency time for Fast DTX availability upon channel start (TDMAs) | |
555 #define FAST_DTX_LATENCY 10 //chaged from value-4 -CQ- 74387 | |
556 #endif | |
557 | |
558 //-------------------------------------------------------- | 680 //-------------------------------------------------------- |
559 // standard specific constants used in l1_config.std.xxx | 681 // standard specific constants used in l1_config.std.xxx |
560 //-------------------------------------------------------- | 682 //-------------------------------------------------------- |
561 #if (L1_FF_MULTIBAND == 0) | 683 |
562 | 684 |
563 // GSM | 685 // GSM |
564 #define FIRST_ARFCN_GSM 1 // 1st arfcn is 1 | 686 #define FIRST_ARFCN_GSM 1 // 1st arfcn is 1 |
565 #define NBMAX_CARRIER_GSM 124 // 124 for GSM, 174 for E_GSM, 374 for DCS1800. | 687 #define NBMAX_CARRIER_GSM 124 // 124 for GSM, 174 for E_GSM, 374 for DCS1800. |
566 #define MAX_TXPWR_GSM 19 // lowest power ctrl level value in GSM band | 688 #define MAX_TXPWR_GSM 19 // lowest power ctrl level value in GSM band |
602 #define NBMAX_CARRIER NBMAX_CARRIER_DUALEXT //used in arrays for power measurement | 724 #define NBMAX_CARRIER NBMAX_CARRIER_DUALEXT //used in arrays for power measurement |
603 //non optimized!!! (dynamic memory allocation to optimize) | 725 //non optimized!!! (dynamic memory allocation to optimize) |
604 #define BAND1 1 | 726 #define BAND1 1 |
605 #define BAND2 2 | 727 #define BAND2 2 |
606 | 728 |
607 #else // L1_FF_MULTIBAND == 1 below | |
608 | |
609 /***** GSM Band Identifiers to be communicated to the L3, these indexes are fixed *****************/ | |
610 #define PGSM900 0 | |
611 #define GSM850 1 | |
612 #define PCS1900 2 | |
613 #define DCS1800 3 | |
614 #define GSM750 4 | |
615 #define GSM480 5 | |
616 #define GSM450 6 | |
617 #define T_GSM380 7 | |
618 #define T_GSM410 8 | |
619 #define T_GSM900 9 | |
620 #define EGSM900 10 | |
621 #define RGSM900 11 | |
622 | |
623 /***** PGSM900, EGSM900 and RGSM900 are seen a single band GSM900 **********************************/ | |
624 #define GSM900 12 | |
625 | |
626 /***** The total number of bands specified in the 3GPP Specs ***************************************/ | |
627 #define NB_MAX_GSM_BANDS 12 | |
628 | |
629 #if 0 | |
630 /********************************* Physical_band_ids to be supported Definition *******************/ | |
631 #define RGSM900_SUPPORTED 0 | |
632 #define EGSM900_SUPPORTED 1 | |
633 #define PGSM900_SUPPORTED 0 | |
634 #define GSM850_SUPPORTED 1 | |
635 #define PCS1900_SUPPORTED 1 | |
636 #define DCS1800_SUPPORTED 1 | |
637 #define GSM750_SUPPORTED 0 | |
638 #define GSM710_SUPPORTED 0 | |
639 #define GSM480_SUPPORTED 0 | |
640 #define T_GSM380_SUPPORTED 0 | |
641 #define T_GSM410_SUPPORTED 0 | |
642 #define GSM450_SUPPORTED 0 | |
643 #define T_GSM900_SUPPORTED 0 | |
644 | |
645 /***** Bands to be supported Eror Cases ******************************************/ | |
646 | |
647 #if (RGSM900_SUPPORTED + EGSM900_SUPPORTED + PGSM900_SUPPORTED > 1) | |
648 #error " Only one of the RGSM900 or EGSM900 or PGSM900 bands is supported" | |
649 #endif/*if(RGSM900_SUPPORTED + EGSM900_SUPPORTED + PGSM900_SUPPORTED > 1)*/ | |
650 | |
651 | |
652 /***** GSM900_SUPPORTED means one of P, E or R GSM900 is supported ***/ | |
653 #if ((PGSM900_SUPPORTED == 1) || (EGSM900_SUPPORTED == 1) || (RGSM900_SUPPORTED == 1)) | |
654 #define GSM900_SUPPORTED 1 | |
655 #endif | |
656 | |
657 #endif // if 0 | |
658 | |
659 /***** Number of Physical Bands Supported by the L1 Calculation, this constant is less than NB_MAX_GSM_BANDS**********/ | |
660 #define NB_MAX_SUPPORTED_BANDS (GSM900_SUPPORTED +\ | |
661 GSM850_SUPPORTED + \ | |
662 PCS1900_SUPPORTED + \ | |
663 DCS1800_SUPPORTED + \ | |
664 GSM750_SUPPORTED + \ | |
665 GSM480_SUPPORTED + \ | |
666 GSM450_SUPPORTED + \ | |
667 T_GSM410_SUPPORTED + \ | |
668 T_GSM380_SUPPORTED + \ | |
669 T_GSM900_SUPPORTED) | |
670 | |
671 /***** | |
672 EGSM and RGSM have two separate ranges of ARFCN's that are considered by L1 as | |
673 separate bands. Hence number of supported bands is one more if E or R GSM900 is | |
674 supported. | |
675 *****/ | |
676 #if (PGSM900_SUPPORTED == 1)// This means E or R GSM900 is not supported | |
677 #define NB_MAX_EFFECTIVE_SUPPORTED_BANDS NB_MAX_SUPPORTED_BANDS | |
678 #endif | |
679 | |
680 #if ((EGSM900_SUPPORTED == 1) || (RGSM900_SUPPORTED == 1)) | |
681 #define NB_MAX_EFFECTIVE_SUPPORTED_BANDS (NB_MAX_SUPPORTED_BANDS + 1) | |
682 #endif | |
683 | |
684 #if 0 | |
685 /*The following constants allows the indexing of the physical bands in the MULTIBAND rf table located in l1_cust.c*/ | |
686 /*The bands positionning order is related to the bands ENUMERATION here below*/ | |
687 /*Changing the bands positions in this table implies changing the the band ENUMERATION in the file l1_const.h*/ | |
688 /*Changing the the band ENUMERATION in the file l1_const.h implies changing the bands positions in the table below*/ | |
689 enum | |
690 { | |
691 #if (GSM900_SUPPORTED == 1) | |
692 GSM900_ID, | |
693 #endif /*if (GSM900_SUPPORTED == 1)*/ | |
694 | |
695 #if (GSM850_SUPPORTED == 1) | |
696 GSM850_ID, | |
697 #endif /*if (GSM850_SUPPORTED == 1)*/ | |
698 | |
699 #if (DCS1800_SUPPORTED == 1) | |
700 DCS1800_ID, | |
701 #endif /*if (DCS1800_SUPPORTED == 1)*/ | |
702 | |
703 #if (PCS1900_SUPPORTED == 1) | |
704 PCS1900_ID, | |
705 #endif /*if (PCS1900_SUPPORTED == 1)*/ | |
706 | |
707 #if (GSM750_SUPPORTED == 1) | |
708 GSM750_ID, | |
709 #endif /*if (GSM750_SUPPORTED == 1)*/ | |
710 | |
711 #if (GSM480_SUPPORTED == 1) | |
712 GSM480_ID, | |
713 #endif /*if (GSM480_SUPPORTED == 1)*/ | |
714 | |
715 #if GSM450_SUPPORTED | |
716 GSM450_ID, | |
717 #endif /*if (GSM450_SUPPORTED == 1)*/ | |
718 | |
719 #if (T_GSM410_SUPPORTED == 1) | |
720 T_GSM410_ID, | |
721 #endif /*if (T_GSM410_SUPPORTED == 1)*/ | |
722 | |
723 #if (T_GSM380_SUPPORTED == 1) | |
724 T_GSM380_ID, | |
725 #endif /*if (T_GSM380_SUPPORTED == 1)*/ | |
726 | |
727 #if (T_GSM900_SUPPORTED == 1) | |
728 T_GSM900_ID, | |
729 #endif /*if (T_GSM900_SUPPORTED == 1)*/ | |
730 }; | |
731 #endif | |
732 /***********************************Calculation of the number of carriers per Effective Band*********/ | |
733 #if 0 | |
734 | |
735 #if (PGSM900_SUPPORTED == 1) | |
736 #define NB_CARRIER_900_LOW_SUB_BAND 124 | |
737 #define NB_CARRIER_900_HIGH_SUB_BAND 0 | |
738 #endif /*if (PGSM900_SUPPORTED == 1)*/ | |
739 | |
740 #if (EGSM900_SUPPORTED == 1) | |
741 #define NB_CARRIER_900_LOW_SUB_BAND 125 | |
742 #define NB_CARRIER_900_HIGH_SUB_BAND 49 | |
743 #endif /*if (EGSM900_SUPPORTED == 1)*/ | |
744 | |
745 #if (RGSM900_SUPPORTED == 1) | |
746 #define NB_CARRIER_900_LOW_SUB_BAND 125 | |
747 #define NB_CARRIER_900_HIGH_SUB_BAND 69 | |
748 #endif /*if (RGSM900_SUPPORTED == 1)*/ | |
749 | |
750 #define NB_CARRIER_850 124 | |
751 #define NB_CARRIER_1800 344 | |
752 #define NB_CARRIER_1900 299 | |
753 #define NB_CARRIER_750 74 | |
754 #define NB_CARRIER_480 35 | |
755 #define NB_CARRIER_450 35 | |
756 #define NB_CARRIER_T_410 47 | |
757 #define NB_CARRIER_T_380 47 | |
758 #define NB_CARRIER_T_900 27 | |
759 | |
760 /****** NBMAX_CARRIER is the total number of carriers supported based on band support *********/ | |
761 | |
762 #define NBMAX_CARRIER (((NB_CARRIER_900_LOW_SUB_BAND + NB_CARRIER_900_HIGH_SUB_BAND) * GSM900_SUPPORTED) \ | |
763 + (NB_CARRIER_850 * GSM850_SUPPORTED) \ | |
764 + (NB_CARRIER_1800 * DCS1800_SUPPORTED)\ | |
765 + (NB_CARRIER_1900 * PCS1900_SUPPORTED) \ | |
766 + (NB_CARRIER_750 * GSM750_SUPPORTED) \ | |
767 + (NB_CARRIER_480 * GSM480_SUPPORTED) \ | |
768 + (NB_CARRIER_450 * GSM450_SUPPORTED) \ | |
769 + (NB_CARRIER_T_410 * T_GSM410_SUPPORTED) \ | |
770 + (NB_CARRIER_T_380 * T_GSM380_SUPPORTED) \ | |
771 + (NB_CARRIER_T_900 * T_GSM900_SUPPORTED)) | |
772 | |
773 | |
774 /** | |
775 The multiband frequency numbers exchanged across L3-L1 I/F are the 3GPP ARFCN numbers | |
776 with exceptiopn of 1900 where the numbers start from 1024 onwards. This results in | |
777 holes in the numbering given from L3 and hence cannot be used for indexing arrays of | |
778 carriers. To index arrays the frequency numbers from L3 are translated to 'operative radio | |
779 frequencies'. For any band configuration supported, this is a continuos number from | |
780 0 to NBMAX_CARRIER (The sum of number of carriers in all supported bands) | |
781 The defines below are for finding the first operative frequency corresponding to each band | |
782 **/ | |
783 | |
784 #define FIRST_OPERATIVE_RADIO_FREQ_900_LOW_SUB_BAND 0 | |
785 #define FIRST_OPERATIVE_RADIO_FREQ_900_HIGH_SUB_BAND (FIRST_OPERATIVE_RADIO_FREQ_900_LOW_SUB_BAND + NB_CARRIER_900_LOW_SUB_BAND) * GSM900_SUPPORTED | |
786 #define FIRST_OPERATIVE_RADIO_FREQ_850 (FIRST_OPERATIVE_RADIO_FREQ_900_HIGH_SUB_BAND + NB_CARRIER_900_HIGH_SUB_BAND) * GSM850_SUPPORTED | |
787 #define FIRST_OPERATIVE_RADIO_FREQ_1900 (FIRST_OPERATIVE_RADIO_FREQ_850 + NB_CARRIER_850) * PCS1900_SUPPORTED | |
788 #define FIRST_OPERATIVE_RADIO_FREQ_1800 (FIRST_OPERATIVE_RADIO_FREQ_1900 + NB_CARRIER_1900) * DCS1800_SUPPORTED | |
789 #define FIRST_OPERATIVE_RADIO_FREQ_750 (FIRST_OPERATIVE_RADIO_FREQ_1800 + NB_CARRIER_1800) * GSM750_SUPPORTED | |
790 #define FIRST_OPERATIVE_RADIO_FREQ_480 (FIRST_OPERATIVE_RADIO_FREQ_750 + NB_CARRIER_750) * GSM480_SUPPORTED | |
791 #define FIRST_OPERATIVE_RADIO_FREQ_450 (FIRST_OPERATIVE_RADIO_FREQ_480 + NB_CARRIER_480) * GSM450_SUPPORTED | |
792 #define FIRST_OPERATIVE_RADIO_FREQ_T_410 (FIRST_OPERATIVE_RADIO_FREQ_450 + NB_CARRIER_450) * T_GSM410_SUPPORTED | |
793 #define FIRST_OPERATIVE_RADIO_FREQ_T_380 (FIRST_OPERATIVE_RADIO_FREQ_T_410 + NB_CARRIER_T_410) * T_GSM380_SUPPORTED | |
794 #define FIRST_OPERATIVE_RADIO_FREQ_T_900 (FIRST_OPERATIVE_RADIO_FREQ_T_380 + NB_CARRIER_T_380) * T_GSM900_SUPPORTED | |
795 | |
796 /********************** Definition of the first radio freqs as per L3-L1 interface *********/ | |
797 | |
798 #if (PGSM900_SUPPORTED == 1) | |
799 #define FIRST_RADIO_FREQ_900_LOW_SUB_BAND 1 | |
800 #define FIRST_RADIO_FREQ_900_HIGH_SUB_BAND 0 | |
801 #endif /*if (PGSM900_SUPPORTED == 1)*/ | |
802 | |
803 #if (EGSM900_SUPPORTED == 1) | |
804 #define FIRST_RADIO_FREQ_900_LOW_SUB_BAND 0 | |
805 #define FIRST_RADIO_FREQ_900_HIGH_SUB_BAND 975 | |
806 #endif /*if (EGSM900_SUPPORTED == 1)*/ | |
807 | |
808 #if (RGSM900_SUPPORTED == 1) | |
809 #define FIRST_RADIO_FREQ_900_LOW_SUB_BAND 0 | |
810 #define FIRST_RADIO_FREQ_900_HIGH_SUB_BAND 955 | |
811 #endif /* (RGSM900_SUPPORTED == 1)*/ | |
812 | |
813 #define FIRST_RADIO_FREQ_850 128 | |
814 #define FIRST_RADIO_FREQ_1800 512 | |
815 #define FIRST_RADIO_FREQ_1900 1024 | |
816 #define FIRST_TPU_RADIO_FREQ_1900 512 /* TBD The GSM1900 is the unique band in which the FIRST_TPU_RADIO is not equal to FIRST_RADIO_FREQ*/ | |
817 | |
818 #endif // if 0 | |
819 | |
820 #endif // L1_FF_MULTIBAND == 0 | |
821 | |
822 #if (L1_FF_MULTIBAND == 0) | |
823 #else | |
824 /* Prototypes */ | |
825 | |
826 #define l1_multiband_radio_freq_convert_into_effective_band_id(radio_freq) \ | |
827 rf_convert_rffreq_to_l1subband(radio_freq) | |
828 | |
829 #define l1_multiband_radio_freq_convert_into_physical_band_id(radio_freq) \ | |
830 ((UWORD8)rf_convert_l1freq_to_rf_band_idx(rf_convert_rffreq_to_l1freq(radio_freq))) | |
831 | |
832 #define l1_multiband_radio_freq_convert_into_operative_radio_freq(radio_freq) \ | |
833 rf_convert_rffreq_to_l1freq(radio_freq) | |
834 | |
835 #if (CODE_VERSION != SIMULATION) | |
836 UWORD8 rf_convert_rffreq_to_l1subband(UWORD16 rf_freq); | |
837 UWORD8 rf_convert_l1freq_to_l1subband(UWORD16 l1_freq); | |
838 WORD8 rf_convert_l1freq_to_rf_band_idx(UWORD16 l1_freq); | |
839 UWORD16 rf_convert_l1freq_to_rffreq(UWORD16 l1_freq ); | |
840 UWORD16 rf_convert_l1freq_to_rffreq_rfband(UWORD16 l1_freq, WORD8 *rf_band_index); | |
841 UWORD16 rf_convert_l1freq_to_arfcn_rfband(UWORD16 l1_freq, WORD8 *rf_band_index); | |
842 UWORD16 rf_convert_rffreq_to_l1freq(UWORD16 rf_freq); | |
843 UWORD16 rf_convert_rffreq_to_l1freq_rfband(UWORD16 rf_freq, WORD8 *rf_band_index); | |
844 UWORD16 rf_convert_tmarfcn_to_l1freq(UWORD16 tm_arfcn, WORD8 * error_flag); | |
845 #endif | |
846 | |
847 /* RF defines */ | |
848 /******************************Physical_band_ids to be supported Definition****************************************/ | |
849 #define RGSM900_SUPPORTED 0 | |
850 #define PGSM900_SUPPORTED 0 | |
851 #define GSM750_SUPPORTED 0 | |
852 #define GSM710_SUPPORTED 0 | |
853 #define GSM480_SUPPORTED 0 | |
854 #define T_GSM380_SUPPORTED 0 | |
855 #define T_GSM410_SUPPORTED 0 | |
856 #define GSM450_SUPPORTED 0 | |
857 #define T_GSM900_SUPPORTED 0 | |
858 #if 0 | |
859 #if (RF_BAND_SYSTEM_INDEX == RF_DCS1800_850_DUALBAND) | |
860 #define GSM900_SUPPORTED 0 | |
861 #define GSM850_SUPPORTED 1 | |
862 #define PCS1900_SUPPORTED 0 | |
863 #define DCS1800_SUPPORTED 1 | |
864 #elif (RF_BAND_SYSTEM_INDEX == RF_PCS1900_900_DUALBAND) | |
865 #define GSM900_SUPPORTED 1 | |
866 #define GSM850_SUPPORTED 0 | |
867 #define PCS1900_SUPPORTED 1 | |
868 #define DCS1800_SUPPORTED 0 | |
869 #elif (RF_BAND_SYSTEM_INDEX == RF_US_DUALBAND) | |
870 #define GSM900_SUPPORTED 0 | |
871 #define GSM850_SUPPORTED 1 | |
872 #define PCS1900_SUPPORTED 1 | |
873 #define DCS1800_SUPPORTED 0 | |
874 #elif (RF_BAND_SYSTEM_INDEX == RF_US_TRIBAND) | |
875 #define GSM900_SUPPORTED 0 | |
876 #define GSM850_SUPPORTED 1 | |
877 #define PCS1900_SUPPORTED 1 | |
878 #define DCS1800_SUPPORTED 1 | |
879 #elif (RF_BAND_SYSTEM_INDEX == RF_EU_DUALBAND) | |
880 #define GSM900_SUPPORTED 1 | |
881 #define GSM850_SUPPORTED 0 | |
882 #define PCS1900_SUPPORTED 0 | |
883 #define DCS1800_SUPPORTED 1 | |
884 #elif (RF_BAND_SYSTEM_INDEX == RF_EU_TRIBAND) | |
885 #define GSM900_SUPPORTED 1 | |
886 #define GSM850_SUPPORTED 0 | |
887 #define PCS1900_SUPPORTED 1 | |
888 #define DCS1800_SUPPORTED 1 | |
889 #elif (RF_BAND_SYSTEM_INDEX == RF_QUADBAND) | |
890 #define GSM900_SUPPORTED 1 | |
891 #define GSM850_SUPPORTED 1 | |
892 #define PCS1900_SUPPORTED 1 | |
893 #define DCS1800_SUPPORTED 1 | |
894 #endif | |
895 #endif // if 0 TBD | |
896 #define GSM900_SUPPORTED 1 | |
897 #define GSM850_SUPPORTED 1 | |
898 #define PCS1900_SUPPORTED 1 | |
899 #define DCS1800_SUPPORTED 1 | |
900 | |
901 /* The physical RF bands are enumerated in order of increasing frequencies */ | |
902 /* The same order must be used in l1_rf61, l1_cust, and l1_const */ | |
903 enum | |
904 { | |
905 #if (GSM900_SUPPORTED == 1) | |
906 RF_GSM900, | |
907 #endif | |
908 #if (GSM850_SUPPORTED == 1) | |
909 RF_GSM850, | |
910 #endif | |
911 #if (DCS1800_SUPPORTED == 1) | |
912 RF_DCS1800, | |
913 #endif | |
914 #if (PCS1900_SUPPORTED == 1) | |
915 RF_PCS1900, | |
916 #endif | |
917 RF_NB_SUPPORTED_BANDS /* The number of supported physical bands */ | |
918 }; | |
919 | |
920 #if GSM900_SUPPORTED | |
921 #define RF_NB_SUBBANDS (RF_NB_SUPPORTED_BANDS + 1) | |
922 #else | |
923 #define RF_NB_SUBBANDS (RF_NB_SUPPORTED_BANDS) | |
924 #endif | |
925 | |
926 /***********************************Calculation of the number of carriers per Effective Band*********/ | |
927 #define NB_CHAN_900L 125 | |
928 #define NB_CHAN_900H 49 | |
929 #define NB_CHAN_850 124 | |
930 #define NB_CHAN_1800 374 | |
931 #define NB_CHAN_1900 299 | |
932 | |
933 /** | |
934 The multiband frequency numbers exchanged across L3-L1 I/F are the 3GPP ARFCN numbers | |
935 except for DCS1900 where the numbers start from 1024 onwards, i.e. ARFCN+512. | |
936 L1 cannot have holes in the numbering, so a different L1 internal one is needed to build arrays in L1. | |
937 This numbering is similar to ARFCN numbering, except the high part of GSM900 channel numbers | |
938 are mapped between low part of GSM900 numbers and the GSM850 numbers. | |
939 For any band configuration supported, this is a continuos number from | |
940 0 to NB_CARRIERS (The sum of number of carriers in all supported bands) | |
941 **/ | |
942 /****** L1_NB_CARRIER is the total number of carriers supported based on band support *********/ | |
943 #define L1_FREQ_1ST_900L 0 | |
944 #define L1_FREQ_1ST_900H (L1_FREQ_1ST_900L + NB_CHAN_900L * GSM900_SUPPORTED) | |
945 #define L1_FREQ_1ST_850 (L1_FREQ_1ST_900H + NB_CHAN_900H * GSM900_SUPPORTED) | |
946 #define L1_FREQ_1ST_1800 (L1_FREQ_1ST_850 + NB_CHAN_850 * GSM850_SUPPORTED) | |
947 #define L1_FREQ_1ST_1900 (L1_FREQ_1ST_1800 + NB_CHAN_1800 * DCS1800_SUPPORTED) | |
948 #define NBMAX_CARRIER (L1_FREQ_1ST_1900 + NB_CHAN_1900 * PCS1900_SUPPORTED) | |
949 | |
950 #define ARFCN_1ST_900L 0 | |
951 #define ARFCN_1ST_900H 975 | |
952 #define ARFCN_1ST_850 128 | |
953 #define ARFCN_1ST_1800 512 | |
954 #define ARFCN_1ST_1900 512 | |
955 | |
956 #define RF_FREQ_1ST_900L ARFCN_1ST_900L | |
957 #define RF_FREQ_1ST_900H ARFCN_1ST_900H | |
958 #define RF_FREQ_1ST_850 ARFCN_1ST_850 | |
959 #define RF_FREQ_1ST_1800 ARFCN_1ST_1800 | |
960 #define RF_FREQ_1ST_1900 (ARFCN_1ST_1900 + 512) | |
961 | |
962 | |
963 typedef struct | |
964 { | |
965 UWORD16 first_rf_freq; | |
966 UWORD16 last_rf_freq; | |
967 UWORD16 first_l1_freq; | |
968 WORD16 l1freq2rffreq; | |
969 } | |
970 T_MULTIBAND_CONVERT; | |
971 | |
972 typedef struct | |
973 { | |
974 UWORD8 power_class; | |
975 UWORD8 tx_turning_point; | |
976 UWORD8 max_txpwr; | |
977 UWORD8 gsm_band_identifier; | |
978 char* name; | |
979 } | |
980 T_MULTIBAND_RF; | |
981 | |
982 #endif /*if (L1_FF_MULTIBAND == 1)*/ | |
983 | |
984 | |
985 | |
986 #define NO_TXPWR 255 // sentinal value used with UWORD8 type. | 729 #define NO_TXPWR 255 // sentinal value used with UWORD8 type. |
987 | 730 |
988 | 731 |
989 //-------------------------------------------------------- | 732 //-------------------------------------------------------- |
990 // Receive level values. | 733 // Receive level values. |
991 //-------------------------------------------------------- | 734 //-------------------------------------------------------- |
992 #define RXLEV63 63 // max value for RXLEV. | 735 #define RXLEV63 63 // max value for RXLEV. |
993 #define IL_MIN 240 // minimum input level is -120 dbm. | 736 #define IL_MIN 240 // minimum input level is -120 dbm. |
737 | |
738 //-------------------------------------------------------- | |
739 // Max number of cell to report in MPHC_RXLEV_IND. | |
740 // Nb cells to check to see if cell of MPHC_NETWORK_SYNC_REQ has been detected | |
741 //-------------------------------------------------------- | |
742 #define MAX_MEAS_RXLEV_IND_TRACE 10 | |
743 #define NB_FQ_TO_CHK 4 | |
994 | 744 |
995 /*--------------------------------------------------------*/ | 745 /*--------------------------------------------------------*/ |
996 /* Max value for GSM Paging Parameters. */ | 746 /* Max value for GSM Paging Parameters. */ |
997 /*--------------------------------------------------------*/ | 747 /*--------------------------------------------------------*/ |
998 #define MAX_AG_BLKS_RES_NCOMB 7 | 748 #define MAX_AG_BLKS_RES_NCOMB 7 |
1047 #define CBCH_TB3 0x0004 | 797 #define CBCH_TB3 0x0004 |
1048 #define CBCH_TB5 0x0008 | 798 #define CBCH_TB5 0x0008 |
1049 #define CBCH_TB6 0x0010 | 799 #define CBCH_TB6 0x0010 |
1050 #define CBCH_TB7 0x0020 | 800 #define CBCH_TB7 0x0020 |
1051 | 801 |
1052 #if FF_TBF | |
1053 /*--------------------------------------------------------*/ | |
1054 /* Access burst types on the RACH/PRACH */ | |
1055 /*--------------------------------------------------------*/ | |
1056 #define ACC_BURST_8 0 | |
1057 #define ACC_BURST_11 1 | |
1058 #define ACC_BURST_11_TS1 2 | |
1059 #define ACC_BURST_11_TS2 3 | |
1060 #endif | |
1061 #define CBCH_CONTINUOUS_READING 0 | 802 #define CBCH_CONTINUOUS_READING 0 |
1062 #define CBCH_SCHEDULED 1 | 803 #define CBCH_SCHEDULED 1 |
1063 #define CBCH_INACTIVE 2 | 804 #define CBCH_INACTIVE 2 |
1064 | 805 |
1065 /*--------------------------------------------------------*/ | 806 /*--------------------------------------------------------*/ |
1102 #define CON_EST_MODE1 3 // functional mode in ACCESS (before 1st RA, for TOA convergency). | 843 #define CON_EST_MODE1 3 // functional mode in ACCESS (before 1st RA, for TOA convergency). |
1103 #define CON_EST_MODE2 4 // functional mode in ACCESS (after 1st RA). | 844 #define CON_EST_MODE2 4 // functional mode in ACCESS (after 1st RA). |
1104 #define DEDIC_MODE 5 // functional mode in DEDICATED. | 845 #define DEDIC_MODE 5 // functional mode in DEDICATED. |
1105 #define DEDIC_MODE_HALF_DATA 6 // used only for TOA histogram length purpose. | 846 #define DEDIC_MODE_HALF_DATA 6 // used only for TOA histogram length purpose. |
1106 #if L1_GPRS | 847 #if L1_GPRS |
1107 #define PACKET_TRANSFER_MODE 7 // | 848 #define PACKET_TRANSFER_MODE 7 |
1108 #endif | 849 #endif |
1109 | 850 |
1110 /*--------------------------------------------------------*/ | 851 /*--------------------------------------------------------*/ |
1111 /* Error causes for MPHC_NO_BCCH message. */ | 852 /* Error causes for MPHC_NO_BCCH message. */ |
1112 /*--------------------------------------------------------*/ | 853 /*--------------------------------------------------------*/ |
1113 #define NO_FB_SB 0 // FB or SB not found. | 854 #define NO_FB_SB 0 // FB or SB not found. |
1114 #define NCC_NOT_PERMITTED 1 // Synchro OK! but PLMN not permitted. | 855 #define NCC_NOT_PERMITTED 1 // Synchro OK! but PLMN not permitted. |
1115 | 856 |
1116 /*--------------------------------------------------------*/ | 857 /*--------------------------------------------------------*/ |
1135 #define CTRL_FB_ABORT (TRUE_L << 9) | 876 #define CTRL_FB_ABORT (TRUE_L << 9) |
1136 #if L1_GPRS | 877 #if L1_GPRS |
1137 #define CTRL_PRACH (TRUE_L << 10) | 878 #define CTRL_PRACH (TRUE_L << 10) |
1138 #define CTRL_SYSINGLE (TRUE_L << 11) | 879 #define CTRL_SYSINGLE (TRUE_L << 11) |
1139 #endif | 880 #endif |
1140 #if ((REL99 == 1) && (FF_BHO == 1)) | 881 |
1141 #define CTRL_FBSB_ABORT (TRUE_L << 12) | |
1142 #endif | |
1143 | 882 |
1144 /********************************/ | 883 /********************************/ |
1145 /* MISC management */ | 884 /* MISC management */ |
1146 /********************************/ | 885 /********************************/ |
1147 #define GSM_CTL 0 // DSP ctrl for a GSM task | 886 #define GSM_CTL 0 // DSP ctrl for a GSM task |
1250 // Values 1,2,3 reserved for "number of measurements". | 989 // Values 1,2,3 reserved for "number of measurements". |
1251 #define FB_DSP_TASK 5 // Freq. Burst reading task in Idle mode. | 990 #define FB_DSP_TASK 5 // Freq. Burst reading task in Idle mode. |
1252 #define SB_DSP_TASK 6 // Sync. Burst reading task in Idle mode. | 991 #define SB_DSP_TASK 6 // Sync. Burst reading task in Idle mode. |
1253 #define TCH_FB_DSP_TASK 8 // Freq. Burst reading task in Dedicated mode. | 992 #define TCH_FB_DSP_TASK 8 // Freq. Burst reading task in Dedicated mode. |
1254 #define TCH_SB_DSP_TASK 9 // Sync. Burst reading task in Dedicated mode. | 993 #define TCH_SB_DSP_TASK 9 // Sync. Burst reading task in Dedicated mode. |
1255 #if ((REL99 == 1) && (FF_BHO == 1)) | |
1256 #define FBSB_DSP_TASK 16 // Freq.+Sync. Burst reading task in Blind Handover. | |
1257 #endif | |
1258 #define IDLE1 1 | 994 #define IDLE1 1 |
1259 | 995 |
1260 // Debug tasks | 996 // Debug tasks |
1261 #define CHECKSUM_DSP_TASK 33 | 997 #define CHECKSUM_DSP_TASK 33 |
1262 #define TST_NDB 35 // Checksum DSP->MCU | 998 #define TST_NDB 35 // Checksum DSP->MCU |
1267 // Identifier for measurement, FB / SB search tasks. | 1003 // Identifier for measurement, FB / SB search tasks. |
1268 // Values 1,2,3 reserved for "number of measurements". | 1004 // Values 1,2,3 reserved for "number of measurements". |
1269 #define TCH_LOOP_A 31 | 1005 #define TCH_LOOP_A 31 |
1270 #define TCH_LOOP_B 32 | 1006 #define TCH_LOOP_B 32 |
1271 | 1007 |
1272 #if (DSP >= 33) | 1008 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) |
1273 #define SC_CHKSUM_VER (DB_W_PAGE_0 + (2 * (0x08DB - 0x800))) | 1009 #define SC_CHKSUM_VER (DB_W_PAGE_0 + (2 * (0x08DB - 0x800))) |
1274 #else | 1010 #else |
1275 #define SC_CHKSUM_VER (DB_W_PAGE_0 + (2 * (0x09A0 - 0x800))) | 1011 #define SC_CHKSUM_VER (DB_W_PAGE_0 + (2 * (0x09A0 - 0x800))) |
1276 #endif | 1012 #endif |
1277 | 1013 |
1299 // below values are defined in the file l1_time.h | 1035 // below values are defined in the file l1_time.h |
1300 //#define D_NSUBB_IDLE 296L | 1036 //#define D_NSUBB_IDLE 296L |
1301 //#define D_NSUBB_DEDIC 30L | 1037 //#define D_NSUBB_DEDIC 30L |
1302 #define D_FB_THR_DET_IACQ 0x3333L | 1038 #define D_FB_THR_DET_IACQ 0x3333L |
1303 #define D_FB_THR_DET_TRACK 0x28f6L | 1039 #define D_FB_THR_DET_TRACK 0x28f6L |
1304 | |
1305 #if (RF_FAM == 60) | |
1306 // UPPCosto without dc offset compensation (DSP algo) | |
1307 #define D_DC_OFF_THRES 0x0000L | |
1308 #else | |
1309 #define D_DC_OFF_THRES 0x7fffL | 1040 #define D_DC_OFF_THRES 0x7fffL |
1310 #endif | |
1311 | |
1312 #define D_DUMMY_THRES 17408L | 1041 #define D_DUMMY_THRES 17408L |
1313 #define D_DEM_POND_GEWL 26624L | 1042 #define D_DEM_POND_GEWL 26624L |
1314 #define D_DEM_POND_RED 20152L | 1043 #define D_DEM_POND_RED 20152L |
1315 #define D_HOLE 0L | 1044 #define D_HOLE 0L |
1316 #define D_TRANSFER_RATE 0x6666L | 1045 #define D_TRANSFER_RATE 0x6666L |
1327 #define D_SD_MIN_THR_TCHFS 15L //(24L *C_POND_RED) | 1056 #define D_SD_MIN_THR_TCHFS 15L //(24L *C_POND_RED) |
1328 #define D_MA_MIN_THR_TCHFS 738L //(1200L *C_POND_RED) | 1057 #define D_MA_MIN_THR_TCHFS 738L //(1200L *C_POND_RED) |
1329 #define D_MD_MAX_THR_TCHFS 1700L //(2000L *C_POND_RED) | 1058 #define D_MD_MAX_THR_TCHFS 1700L //(2000L *C_POND_RED) |
1330 #define D_MD1_MAX_THR_TCHFS 99L //(160L *C_POND_RED) | 1059 #define D_MD1_MAX_THR_TCHFS 99L //(160L *C_POND_RED) |
1331 | 1060 |
1332 #if (DSP >= 33) | 1061 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) |
1333 // Frequency burst definitions | 1062 // Frequency burst definitions |
1334 #define D_FB_MARGIN_BEG 24 | 1063 #define D_FB_MARGIN_BEG 24 |
1335 #define D_FB_MARGIN_END 22 | 1064 #define D_FB_MARGIN_END 22 |
1336 | 1065 |
1337 // V42bis definitions | 1066 // V42bis definitions |
1339 #define D_V42B_SWITCH_MIN 64L | 1068 #define D_V42B_SWITCH_MIN 64L |
1340 #define D_V42B_SWITCH_MAX 250L | 1069 #define D_V42B_SWITCH_MAX 250L |
1341 #define D_V42B_RESET_DELAY 10L | 1070 #define D_V42B_RESET_DELAY 10L |
1342 | 1071 |
1343 // Latencies definitions | 1072 // Latencies definitions |
1344 #if (DSP >= 33) | 1073 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) |
1345 // C.f. BUG1404 | 1074 // C.f. BUG1404 |
1346 #define D_LAT_MCU_BRIDGE 0x000FL | 1075 #define D_LAT_MCU_BRIDGE 0x000FL |
1347 #else | 1076 #else |
1348 #define D_LAT_MCU_BRIDGE 0x0009L | 1077 #define D_LAT_MCU_BRIDGE 0x0009L |
1349 #endif | 1078 #endif |
1356 // Background Task in GSM mode: Initialization. | 1085 // Background Task in GSM mode: Initialization. |
1357 #define D_GSM_BGD_MGT 0L | 1086 #define D_GSM_BGD_MGT 0L |
1358 | 1087 |
1359 #if (CHIPSET == 4) | 1088 #if (CHIPSET == 4) |
1360 #define D_MISC_CONFIG 0L | 1089 #define D_MISC_CONFIG 0L |
1361 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15) | 1090 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) |
1362 // This variable is basically used for Samson. If SAMSON should be zero. | |
1363 // A variable for making DSP not go to IDLE3 when DMA is on | |
1364 #define D_MISC_CONFIG 1L | 1091 #define D_MISC_CONFIG 1L |
1365 #else | 1092 #else |
1366 #define D_MISC_CONFIG 0L | 1093 #define D_MISC_CONFIG 0L |
1367 #endif | 1094 #endif |
1368 | 1095 |
1418 #define D_M1_THRES 5 | 1145 #define D_M1_THRES 5 |
1419 #define D_MAX_OVSP_DL 8 | 1146 #define D_MAX_OVSP_DL 8 |
1420 | 1147 |
1421 // d_ra_act: bit field definition | 1148 // d_ra_act: bit field definition |
1422 #define B_F48BLK 5 | 1149 #define B_F48BLK 5 |
1423 #if REL99 | |
1424 #if FF_EMR | |
1425 #define B_F48BLK_DL 6 | |
1426 #endif | |
1427 #endif | |
1428 | |
1429 | 1150 |
1430 // Mask for b_itc information (d_ra_conf) | 1151 // Mask for b_itc information (d_ra_conf) |
1431 #define CE_MASK 0x04 | 1152 #define CE_MASK 0x04 |
1432 | 1153 |
1433 #define D_FACCH_THR 0 | 1154 #define D_FACCH_THR 0 |
1434 #define D_DSP_TEST 0 | 1155 #define D_DSP_TEST 0 |
1435 #define D_VERSION_NUMBER 0 | 1156 #define D_VERSION_NUMBER 0 |
1436 #define D_TI_VERSION 0 | 1157 #define D_TI_VERSION 0 |
1437 | 1158 |
1438 | 1159 |
1439 /*----------------------------------------------------------------------------*/ | 1160 /*------------------------------------------------------------------------------*/ |
1440 /* */ | 1161 /* */ |
1441 /* DEFINITIONS FOR DSP <-> MCU COMMUNICATION. */ | 1162 /* DEFINITIONS FOR DSP <-> MCU COMMUNICATION. */ |
1442 /* ++++++++++++++++++++++++++++++++++++++++++ */ | 1163 /* ++++++++++++++++++++++++++++++++++++++++++ */ |
1443 /* */ | 1164 /* */ |
1444 /*----------------------------------------------------------------------------*/ | 1165 /*------------------------------------------------------------------------------*/ |
1445 // COMMUNICATION Interrupt definition | 1166 // COMMUNICATION Interrupt definition |
1446 //------------------------------------ | 1167 //------------------------------------ |
1447 #define ALL_16BIT 0xffffL | 1168 #define ALL_16BIT 0xffffL |
1448 #define B_GSM_PAGE (TRUE_L << 0) | 1169 #define B_GSM_PAGE (TRUE_L << 0) |
1449 #define B_GSM_TASK (TRUE_L << 1) | 1170 #define B_GSM_TASK (TRUE_L << 1) |
1461 #define D_TOA 0 // Time Of Arrival. | 1182 #define D_TOA 0 // Time Of Arrival. |
1462 #define D_PM 1 // Power Measurement. | 1183 #define D_PM 1 // Power Measurement. |
1463 #define D_ANGLE 2 // Angle (AFC correction) | 1184 #define D_ANGLE 2 // Angle (AFC correction) |
1464 #define D_SNR 3 // Signal / Noise Ratio. | 1185 #define D_SNR 3 // Signal / Noise Ratio. |
1465 | 1186 |
1466 #if REL99 | |
1467 #if FF_EMR | |
1468 #define D_CV_BEP 2 | |
1469 #define D_MEAN_BEP_MSW 0 | |
1470 #define D_MEAN_BEP_LSW 1 | |
1471 #endif | |
1472 #endif //L1_R99 | |
1473 | |
1474 // Bit name/position definitions. | 1187 // Bit name/position definitions. |
1475 #define B_JOINT 4 // Chase combining flag | |
1476 #define B_FIRE0 5 // Fire result bit 0. (00 -> NO ERROR) (01 -> ERROR CORRECTED) | 1188 #define B_FIRE0 5 // Fire result bit 0. (00 -> NO ERROR) (01 -> ERROR CORRECTED) |
1477 #define B_FIRE1 6 // Fire result bit 1. (10 -> ERROR) (11 -> unused) | 1189 #define B_FIRE1 6 // Fire result bit 1. (10 -> ERROR) (11 -> unused) |
1478 #define B_SCH_CRC 8 // CRC result for SB decoding. (1 for ERROR). | 1190 #define B_SCH_CRC 8 // CRC result for SB decoding. (1 for ERROR). |
1479 #define B_BLUD 15 // Uplink,Downlink data block Present. (1 for PRESENT). | 1191 #define B_BLUD 15 // Uplink,Downlink data block Present. (1 for PRESENT). |
1480 #define B_AF 14 // Activity bit: 1 if data block is valid. | 1192 #define B_AF 14 // Activity bit: 1 if data block is valid. |
1481 #define B_BFI 2 // Bad Frame Indicator | 1193 #define B_BFI 2 // Bad Frame Indicator |
1482 #define B_UFI 0 // UNRELIABLE FRAME Indicator | 1194 #define B_UFI 0 // UNRELIABLE FRAME Indicator |
1483 #define B_ECRC 9 // Enhanced full rate CRC bit | 1195 #define B_ECRC 9 // Enhanced full rate CRC bit |
1484 #define B_EMPTY_BLOCK 10 // for voice memo purpose, this bit is used to determine | 1196 #define B_EMPTY_BLOCK 10 // for voice memo purpose, this bit is used to determine |
1485 | |
1486 #if REL99 | |
1487 #if FF_EMR | |
1488 #define MEAN_BEP_FORMAT 5 // mean_bep is received in F1.31 format from DSP and should be | |
1489 // reported in F6.26 format to L2. | |
1490 #define CV_BEP_FORMAT 5 // cv_bep is received in F3.13 format from DSP and should be | |
1491 // reported in F8.8 format to L2. | |
1492 #define B_SID1 4 // SID1 bit. | |
1493 #define B_M1 0 // M1 bit. | |
1494 #define B_CE 8 // Connection element | |
1495 #define B_FCS_OK 3 // Frame check sequence bit | |
1496 #define WORD_SHIFT 16 // Shift word | |
1497 #endif | |
1498 #endif //L1_R99 | |
1499 | |
1500 | 1197 |
1501 #if (DEBUG_DEDIC_TCH_BLOCK_STAT == 1) | 1198 #if (DEBUG_DEDIC_TCH_BLOCK_STAT == 1) |
1502 #define FACCH_GOOD 10 | 1199 #define FACCH_GOOD 10 |
1503 #define FACCH_BAD 11 | 1200 #define FACCH_BAD 11 |
1504 #endif | 1201 #endif |
1524 #define AMR_INHIBIT 8 | 1221 #define AMR_INHIBIT 8 |
1525 | 1222 |
1526 // List of possible RX types in RATSCCH block | 1223 // List of possible RX types in RATSCCH block |
1527 #define C_RATSCCH_GOOD 5 | 1224 #define C_RATSCCH_GOOD 5 |
1528 | 1225 |
1529 #if REL99 | |
1530 #if FF_EMR | |
1531 #define RATSCCH_GOOD 5 | |
1532 #define RATSCCH_BAD 6 | |
1533 #endif | |
1534 #endif //L1_R99 | |
1535 | |
1536 | |
1537 | |
1538 // List of the possible AMR channel rate | 1226 // List of the possible AMR channel rate |
1539 #define AMR_CHANNEL_4_75 0 | 1227 #define AMR_CHANNEL_4_75 0 |
1540 #define AMR_CHANNEL_5_15 1 | 1228 #define AMR_CHANNEL_5_15 1 |
1541 #define AMR_CHANNEL_5_9 2 | 1229 #define AMR_CHANNEL_5_9 2 |
1542 #define AMR_CHANNEL_6_7 3 | 1230 #define AMR_CHANNEL_6_7 3 |
1543 #define AMR_CHANNEL_7_4 4 | 1231 #define AMR_CHANNEL_7_4 4 |
1544 #define AMR_CHANNEL_7_95 5 | 1232 #define AMR_CHANNEL_7_95 5 |
1545 #define AMR_CHANNEL_10_2 6 | 1233 #define AMR_CHANNEL_10_2 6 |
1546 #define AMR_CHANNEL_12_2 7 | 1234 #define AMR_CHANNEL_12_2 7 |
1547 | |
1548 | 1235 |
1549 // Types of RATSCCH blocks | 1236 // Types of RATSCCH blocks |
1550 #define C_RATSCCH_UNKNOWN 0 | 1237 #define C_RATSCCH_UNKNOWN 0 |
1551 #define C_RATSCCH_CMI_PHASE_REQ 1 | 1238 #define C_RATSCCH_CMI_PHASE_REQ 1 |
1552 #define C_RATSCCH_AMR_CONFIG_REQ_MAIN 2 | 1239 #define C_RATSCCH_AMR_CONFIG_REQ_MAIN 2 |
1591 #define B_BULRAMPDEL 3 // Note: this name is changed | 1278 #define B_BULRAMPDEL 3 // Note: this name is changed |
1592 #define B_BULRAMPDEL2 2 // Note: this name is changed | 1279 #define B_BULRAMPDEL2 2 // Note: this name is changed |
1593 #define B_BULRAMPDEL_BIS 9 | 1280 #define B_BULRAMPDEL_BIS 9 |
1594 #define B_BULRAMPDEL2_BIS 10 | 1281 #define B_BULRAMPDEL2_BIS 10 |
1595 #endif | 1282 #endif |
1596 #if ((RF_FAM == 61) && ((DSP == 38) || (DSP == 39))) | |
1597 #define B_BULRAMPDEL 3 // Note: this name is changed | |
1598 #define B_BULRAMPDEL2 2 // Note: this name is changed | |
1599 #define B_BULRAMPDEL_BIS 9 | |
1600 #define B_BULRAMPDEL2_BIS 10 | |
1601 #endif | |
1602 #define B_AFC 4 | 1283 #define B_AFC 4 |
1603 | 1284 |
1604 // "d_ctrl_system" bits positions. | 1285 // "d_ctrl_system" bits positions. |
1605 #define B_TSQ 0 | 1286 #define B_TSQ 0 |
1606 #define B_BCCH_FREQ_IND 3 | 1287 #define B_BCCH_FREQ_IND 3 |
1607 #define B_TASK_ABORT 15 // Abort RF tasks for DSP. | 1288 #define B_TASK_ABORT 15 // Abort RF tasks for DSP. |
1608 #define B_SWH_APPLY_WHITENING 4 // SWH control(enable, disable) | 1289 |
1609 | 1290 /* |
1610 #if (NEW_SNR_THRESHOLD == 1) && (L1_SAIC == 0) | 1291 * FreeCalypso Frankenstein: the following definition has been |
1611 #error "SNR threshold valid only for SAIC build" | 1292 * imported from LoCosto version of l1_const.h; it is needed for |
1612 #endif | 1293 * the LoCosto-based C code to compile. |
1613 | 1294 */ |
1614 //SAIC related | |
1615 #define B_SWH 1 /* SWH bit position */ | |
1616 #define B_NEW_POND 2 /* NEW_POND bit position*/ | |
1617 #define B_SWH_DOUBLE_INTERPOLATION 3 /* Single or Double Interpolation*/ | |
1618 #define B_SWH_INTERPOLATE 4 /* interpolate or not*/ | |
1619 #define B_TOA_ALMNT 5 /* New TOA alignment from DSP for non saic mode*/ | |
1620 #define B_SNR_ALMNT 6 /* New SNR threshold set to 1024 for AFC and TOA*/ | |
1621 | |
1622 // DB Area | |
1623 #define B_SAIC_DB 0 | |
1624 #define B_NEW_POND_DB 1 | |
1625 #define B_SWH_DB 4 | |
1626 #define B_SWH_CHANTAP 12 | |
1627 #define SAIC_ENABLE_DB ((0x01 << B_SAIC_DB) | (0x01 << B_NEW_POND_DB)) | |
1628 | |
1629 #if (NEW_SNR_THRESHOLD == 1) | |
1630 #if (ONE_THIRD_INTRPOL ==1 ) | |
1631 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)| (1<< B_SWH_DOUBLE_INTERPOLATION)) | (1 << B_SWH_INTERPOLATE) |(1<< B_TOA_ALMNT) | (1 << B_SNR_ALMNT) | |
1632 #else /* ONE_THIRD_INTRPOL == 0*/ | |
1633 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)| (1 << B_SWH_INTERPOLATE) |(1<< B_TOA_ALMNT) | (1 << B_SNR_ALMNT) | |
1634 #endif /* ONE_THIRD_INTRPOL*/ | |
1635 #else /* NEW_SNR_THRESHOLD == 0 */ | |
1636 #if (ONE_THIRD_INTRPOL ==1 ) | |
1637 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)| (1<< B_SWH_DOUBLE_INTERPOLATION)) | (1 << B_SWH_INTERPOLATE) /* added for CQ-95275 & 93303 */ | |
1638 #else | |
1639 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)) | (1 << B_SWH_INTERPOLATE) | |
1640 #endif//ONE_THIRD_INTRPOL | |
1641 #endif /*NEW_SNR_THRESHOLD*/ | |
1642 #if (FF_L1_FAST_DECODING == 1) | |
1643 #define B_FAST_DECODING_FLAG (5) | |
1644 #define C_FAST_DECODING_CRC_FIRE1 (0x02) | |
1645 | |
1646 /* Fast decoding states */ | |
1647 #define C_FAST_DECODING_NONE 0 | |
1648 #define C_FAST_DECODING_AWAITED 1 | |
1649 #define C_FAST_DECODING_PROCESSING 2 | |
1650 #define C_FAST_DECODING_COMPLETE 3 | |
1651 #define C_FAST_DECODING_FORBIDDEN 4 | |
1652 | |
1653 #endif /* FF_L1_FAST_DECODING */ | |
1654 | |
1655 #if (FF_L1_FAST_DECODING == 1) | |
1656 #define C_BA_PM_MEAS (4) | |
1657 #else | |
1658 #define C_BA_PM_MEAS (2) | 1295 #define C_BA_PM_MEAS (2) |
1659 #endif /* FF_L1_FAST_DECODING */ | 1296 |
1660 | |
1661 #if FF_L1_IT_DSP_USF | |
1662 // d_dsp_hint_flag word definition | |
1663 #define B_USF_HINT_ISSUED 0 | |
1664 #define B_NON_USF_HINT_ISSUED 1 | |
1665 #endif | |
1666 #if FF_L1_IT_DSP_DTX | |
1667 // d_fast_dtx_hint word definition- now d_fast_dtx_hint is not used- same as- d_dsp_hint_flag | |
1668 #define B_DTX_HINT_ISSUED 0 | |
1669 #define B_DTX_STATE 1 | |
1670 | |
1671 // d_tch_mode_ext word definition | |
1672 #define B_FAST_DTX_ENABLED 0 | |
1673 #define B_NON_USF_HINT_ISSUED 1 | |
1674 #endif | |
1675 // **************************************************************** | 1297 // **************************************************************** |
1676 // POLESTAR EVABOARD 3 REGISTERS & ADRESSES DEFINITIONS | 1298 // POLESTAR EVABOARD 3 REGISTERS & ADRESSES DEFINITIONS |
1677 // **************************************************************** | 1299 // **************************************************************** |
1678 | 1300 |
1679 | 1301 |
1680 // DSP ADRESSES | 1302 // DSP ADRESSES |
1681 //-------------------- | 1303 //-------------------- |
1682 | 1304 |
1683 #define DB_SIZE (4*20L) // 4 pages of 20 words... | 1305 #define DB_SIZE (4*20L) // 4 pages of 20 words... |
1684 | 1306 |
1685 #if (DSP >= 33) | 1307 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) |
1686 #define MCU_API_BASE_ADDRESS 0xFFD00000L | |
1687 #define DSP_API_BASE_ADDRESS 0x800 | |
1688 #define DB_W_PAGE_0 0xFFD00000L // DB page 0 write : 20 words long | 1308 #define DB_W_PAGE_0 0xFFD00000L // DB page 0 write : 20 words long |
1689 #define DB_W_PAGE_1 0xFFD00028L // DB page 1 write : 20 words long | 1309 #define DB_W_PAGE_1 0xFFD00028L // DB page 1 write : 20 words long |
1690 #define DB_R_PAGE_0 0xFFD00050L // DB page 0 read : 20 words long | 1310 #define DB_R_PAGE_0 0xFFD00050L // DB page 0 read : 20 words long |
1691 #define DB_R_PAGE_1 0xFFD00078L // DB page 1 read : 20 words long | 1311 #define DB_R_PAGE_1 0xFFD00078L // DB page 1 read : 20 words long |
1692 #define NDB_ADR 0xFFD001A8L // NDB start address : 268 words | 1312 #define NDB_ADR 0xFFD001A8L // NDB start address : 268 words |
1694 | 1314 |
1695 #if (DSP_DEBUG_TRACE_ENABLE == 1) | 1315 #if (DSP_DEBUG_TRACE_ENABLE == 1) |
1696 #define DB2_R_PAGE_0 0xFFD00184L | 1316 #define DB2_R_PAGE_0 0xFFD00184L |
1697 #define DB2_R_PAGE_1 0xFFD00188L | 1317 #define DB2_R_PAGE_1 0xFFD00188L |
1698 #endif | 1318 #endif |
1699 | |
1700 #if (DSP >= 38) | |
1701 /* DSP CPU load measurement */ | |
1702 #define DSP_CPU_LOAD_MCU_API_BASE_ADDRESS 0xFFD01DE0L | |
1703 #define DSP_CPU_LOAD_DB_W_PAGE_0 0xFFD01DE0L // DB page 0 write : 4 words long | |
1704 #define DSP_CPU_LOAD_DB_W_PAGE_1 0xFFD01DE8L // DB page 1 write : 4 words long | |
1705 #define DSP_CPU_LOAD_MCU_W_CTRL 0xFFD01DF0L // DSP CPU load feature control | |
1706 #define DSP_CPU_LOAD_MCU_W_TDMA_FN 0xFFD01DF2L // MCU TDMA frame number | |
1707 #endif | |
1708 | |
1709 #else | 1319 #else |
1710 #define MCU_API_BASE_ADDRESS 0xFFD00000L | |
1711 #define DSP_API_BASE_ADDRESS 0x800 | |
1712 #define DB_W_PAGE_0 0xFFD00000L // DB page 0 write : 20 words long | 1320 #define DB_W_PAGE_0 0xFFD00000L // DB page 0 write : 20 words long |
1713 #define DB_W_PAGE_1 0xFFD00028L // DB page 1 write : 20 words long | 1321 #define DB_W_PAGE_1 0xFFD00028L // DB page 1 write : 20 words long |
1714 #define DB_R_PAGE_0 0xFFD00050L // DB page 0 read : 20 words long | 1322 #define DB_R_PAGE_0 0xFFD00050L // DB page 0 read : 20 words long |
1715 #define DB_R_PAGE_1 0xFFD00078L // DB page 1 read : 20 words long | 1323 #define DB_R_PAGE_1 0xFFD00078L // DB page 1 read : 20 words long |
1716 #define NDB_ADR 0xFFD000a0L // NDB start address : 268 words | 1324 #define NDB_ADR 0xFFD000a0L // NDB start address : 268 words |
1717 #define PARAM_ADR 0xFFD002b8L // PARAM start address : 57 words | 1325 #define PARAM_ADR 0xFFD002b8L // PARAM start address : 57 words |
1718 #endif | |
1719 | |
1720 #if (DSP == 38) || (DSP == 39) | |
1721 // a DB common is used by the GSM and GPRS for the common feature | |
1722 #define DB_COMMON_W_PAGE_0 0xFFD00760L // DB common page 0 | |
1723 #define DB_COMMON_W_PAGE_1 0xFFD00780L // DB common page 1 | |
1724 #endif | 1326 #endif |
1725 | 1327 |
1726 // **************************************************************** | 1328 // **************************************************************** |
1727 // ADC reading definitions | 1329 // ADC reading definitions |
1728 // **************************************************************** | 1330 // **************************************************************** |
1786 #define ICMI_MASK 0x0001 | 1388 #define ICMI_MASK 0x0001 |
1787 #define ACS_MASK 0x00FF | 1389 #define ACS_MASK 0x00FF |
1788 #define THR_MASK 0x003F | 1390 #define THR_MASK 0x003F |
1789 #define HYST_MASK 0x000F | 1391 #define HYST_MASK 0x000F |
1790 #define CMIP_MASK 0x0001 | 1392 #define CMIP_MASK 0x0001 |
1791 | 1393 #endif |
1792 #endif | 1394 |
1793 | |
1794 #if (L1_RF_KBD_FIX == 1) | |
1795 | |
1796 #define FRAME_DURATION 5000 | |
1797 #define CUST_DEBOUNCE_TIME 64 | |
1798 | |
1799 #endif | |
1800 | |
1801 #endif // L1_CONST_H |