view src/cs/drivers/drv_app/r2d/board/uwire.c @ 303:f76436d19a7a default tip

!GPRS config: fix long-standing AT+COPS chance hanging bug There has been a long-standing bug in FreeCalypso going back years: sometimes in the AT command bring-up sequence of an ACI-only MS, the AT+COPS command would produce only a power scan followed by cessation of protocol stack activity (only L1 ADC traces), instead of the expected network search sequence. This behaviour was seen in different FC firmware versions going back to Citrine, and seemed to follow some law of chance, not reliably repeatable. This bug has been tracked down and found to be specific to !GPRS configuration, stemming from our TCS2/TCS3 hybrid and reconstruction of !GPRS support that was bitrotten in TCS3.2/LoCosto version. ACI module psa_mms.c, needed only for !GPRS, was missing in the TCS3 version and had to be pulled from TCS2 - but as it turns out, there is a new field in the MMR_REG_REQ primitive that needs to be set correctly, and that psa_mms.c module is the place where this initialization needed to be added.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 08 Jun 2023 08:23:37 +0000
parents 4e78acac3d88
children
line wrap: on
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/************************************************************************************
* uwire.c :            contains driver for the uwire HD module						*
*																					*	
*																					*
*	Author: Davide Carpegna															*
*																					*
*	version: 1.0																	*
*																					*
*	Date: 22/09/2000																*
*   (C) Copyright 2000 by Texas Instruments Incorporated, All Rights Reserved		*		
************************************************************************************/

#include "rv/general.h"
#include "r2d/uwire.h" 
#include "rvf/rvf_api.h"

/********************************************************************/
/*	set the DC input to low for command transmission				*/
/*																	*/
/********************************************************************/
void set_DC_low(void)
{
	* (volatile UINT16 *) GPIO_OUT &= ~(0x02); //gpio(1) ->0
}

/********************************************************************/
/*	set the DC input to high for data transmission	 				*/
/*																	*/
/********************************************************************/
void set_DC_high(void)
{
	* (volatile UINT16 *) GPIO_OUT |= 0x02; //gpio(1) ->1
}

/********************************************************************/
/*	transmit commands to the lcd		    		 				*/
/*																	*/
/********************************************************************/
void lcd_transmit_cmd(UINT8 cmd)
{
	set_DC_low();
	* (volatile UINT16 *) TDR = cmd <<8;
	* (volatile UINT16 *) CSR |= NB_BITS_WR_8 + CS_CMD + START ; // transmit command data
	while (((* (volatile UINT16 *) CSR) & CSRB) != 0 ); // wait for end of WRITE
	* (volatile UINT16 *) CSR &= ~CS_CMD; // clears Chip Select 	
}

/********************************************************************/
/*	transmit data to the lcd			    		 				*/
/*																	*/
/********************************************************************/
void lcd_transmit_data(UINT8 data)
{
	set_DC_high();
	* (volatile  UINT16 *) TDR = data <<8;
	* (volatile UINT16 *) CSR |= NB_BITS_WR_8 + CS_CMD + START ; // transmit data
		//while (((* (volatile UINT16 *) CSR) & CSRB) != 0 ); // wait for end of WRITE
	//* (volatile UINT16 *) CSR &= ~CS_CMD; // clears Chip Select 	
}

extern BOOLEAN lcd_polling(void)
{
	if (((* (volatile UINT16 *) CSR) & CSRB) == 0 )
	{
	    * (volatile UINT16 *) CSR &= ~CS_CMD; // clears Chip Select 
		return(TRUE);
	}
	else 
		return(FALSE);
}

/********************************************************************/
/*	initialize the uwire parameters for the lcd		    			*/
/*																	*/
/********************************************************************/
void uwire_init_lcd()
{
	* ( UINT16 *) GPIO_INOUT &= ~(0x0002); // configures gpio(1) in output mode
	
	* ( UINT16 *) CNTL_RST &= ~(0x04); // releases reset_out
	* ( UINT16 *) CNTL_RST |= (0x04); // set reset_out to 0
	rvf_delay(RVF_MS_TO_TICKS(1));    // waits for 5 ms
	* ( UINT16 *) CNTL_RST &= ~(0x04); // releases reset_out

	
	* (volatile UINT16 *) SR1 = CS1_FRQ_FINT_4 ; // F_INT/4 -> 13M/4 = 3.25 Mhz   
	* (volatile UINT16 *) SR3 = SR3_CLK_EN; // enables the uwire clock
	* (volatile UINT16 *) CSR = INDEX_CS1; // selects CS1
}