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annotate src/cs/layer1/include/l1_varex.h @ 268:f2e52cab0a73

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abb_inth.c: check all interrupt causes, not just one The original code used if - else if - else if etc constructs, thus the first detected interrupt was the only one handled. However, Iota ITSTATREG is a clear-on-read register, thus if we only handle the first detected interrupt and skip checking the others, then the other interrupts will be lost, if more than one interrupt happened to occur in one ABB interrupt handling cycle - a form of rare race condition. Change the code to check all interrupts that were read in this cycle.
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 13 Jun 2021 18:17:53 +0000
parents 4e78acac3d88
children
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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1 /************* Revision Controle System Header *************
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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2 * GSM Layer 1 software
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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3 * L1_VAREX.H
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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4 *
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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5 * Filename l1_varex.h
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6 * Copyright 2003 (C) Texas Instruments
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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7 *
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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8 ************* Revision Controle System Header *************/
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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10 #ifdef L1_ASYNC_C
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11
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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12 #if (LONG_JUMP == 3)
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13 #ifdef __GNUC__
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14 #define SECTION_ATTR __attribute__ ((section (".l1s_global")))
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15 #else
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16 #define SECTION_ATTR
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17 #pragma DATA_SECTION(l1s,".l1s_global")
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18 #pragma DATA_SECTION(l1s_dsp_com,".l1s_global")
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19 #pragma DATA_SECTION(l1a_l1s_com,".l1s_global")
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20 #pragma DATA_SECTION(l1s_tpu_com,".l1s_global")
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21 #pragma DATA_SECTION(l1_config,".l1s_global")
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22 #endif
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23 #else
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24 #define SECTION_ATTR
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25 #endif
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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27 T_L1S_GLOBAL l1s SECTION_ATTR;
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28 T_L1A_GLOBAL l1a;
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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30 T_L1A_L1S_COM l1a_l1s_com SECTION_ATTR;
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31 T_L1S_DSP_COM l1s_dsp_com SECTION_ATTR;
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32 T_L1S_TPU_COM l1s_tpu_com SECTION_ATTR;
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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34 #if (L1_DYN_DSP_DWNLD == 1) // equivalent to an API_HISR flag
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35 T_L1_API_HISR l1_apihisr;
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36 T_L1A_API_HISR_COM l1a_apihisr_com;
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37 #endif
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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39 // variables for L1 configuration
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40 T_L1_CONFIG l1_config SECTION_ATTR;
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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42 #undef SECTION_ATTR
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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44 #else // L1_ASYNC_C
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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46 extern T_L1S_GLOBAL l1s;
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47 extern T_L1A_GLOBAL l1a;
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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49 extern T_L1A_L1S_COM l1a_l1s_com;
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50 extern T_L1S_DSP_COM l1s_dsp_com;
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51 extern T_L1S_TPU_COM l1s_tpu_com;
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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53 #if (L1_DYN_DSP_DWNLD == 1) // equivalent to an API_HISR flag
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54 extern T_L1_API_HISR l1_apihisr;
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55 extern T_L1A_API_HISR_COM l1a_apihisr_com;
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56 #endif
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57
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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58 // variables for L1 configuration
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59 extern T_L1_CONFIG l1_config;
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60 #endif
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61
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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63 extern const UWORD8 ramBootCode[]; // dummy DSP code for boot.
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