FreeCalypso > hg > fc-small-hw
view lunalcd2/src/vsrc/bl_current_sink.v @ 80:6bd0e0627938
sim-fpc-pasv: starting project with MCL
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Tue, 25 Oct 2022 03:17:34 +0000 |
| parents | d5d14b426faa |
| children |
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module bl_current_sink (GND, Vio, BL_EN, LEDK); input GND, Vio, BL_EN; output [1:3] LEDK; wire SET; MAX1916 MAX1916 (.GND(GND), .EN(BL_EN), .SET(SET), .LEDK(LEDK) ); current_select cursel ( .Vio(Vio), .SET(SET) ); endmodule
