FreeCalypso > hg > fc-sim-sniff

annotate boards/sim-fpc-pasv/src/primitives @ 9:10c779b8753e

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FPGA Makefile: capture yosys stdout
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 21 Aug 2023 01:00:16 +0000
parents fbbafa93b52b
children
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fbbafa93b52b starting project with README and sim-fpc-pasv adapter
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 capacitor numpins 2;
fbbafa93b52b starting project with README and sim-fpc-pasv adapter
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2
fbbafa93b52b starting project with README and sim-fpc-pasv adapter
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3 header_4pin numpins 4;
fbbafa93b52b starting project with README and sim-fpc-pasv adapter
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4 conn_6pin_plus2 numpins 8;
fbbafa93b52b starting project with README and sim-fpc-pasv adapter
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 pkg_SIM_socket numpins 8;