changeset 46:559a8b3ef10b

FFS code: first attempt at non-invasive gcc support
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 19 Jul 2018 00:35:33 +0000
parents e955d102e7c4
children d2074d1102e0
files src/cs/drivers/drv_app/ffs/board/amdsbdrv.c src/cs/drivers/drv_app/ffs/board/drv.c src/cs/drivers/drv_app/ffs/board/intelsbdrv.c
diffstat 3 files changed, 46 insertions(+), 0 deletions(-) [+]
line wrap: on
line diff
--- a/src/cs/drivers/drv_app/ffs/board/amdsbdrv.c	Tue Jul 17 18:17:27 2018 +0000
+++ b/src/cs/drivers/drv_app/ffs/board/amdsbdrv.c	Thu Jul 19 00:35:33 2018 +0000
@@ -13,6 +13,7 @@
 #include "ffs/ffs.h"
 #include "ffs/board/drv.h"
 #include "ffs/board/ffstrace.h"
+#include "nucleus.h"
 
 
 // Due to long branches, we disable all tracing and led function calls.
@@ -22,8 +23,13 @@
 #define ttw(contents)
 
 
+#ifdef __GNUC__
+asm(".globl ffsdrv_ram_amd_begin");
+asm("ffsdrv_ram_amd_begin:");
+#else
 asm("        .label _ffsdrv_ram_amd_begin");
 asm("        .def   _ffsdrv_ram_amd_begin");
+#endif
 
 
 // IMPORTANT! Apparently, placing the int_disable/enable() function code
@@ -138,6 +144,9 @@
 
 uint32 amd_int_disable(void)
 {
+#ifdef __GNUC__
+	return NU_Control_Interrupts(0xC0);
+#else
     asm("        .state16");
     asm("        mov       A1, #0xC0");
     asm("        ldr       A2, tct_amd_disable");
@@ -145,20 +154,30 @@
 
     asm("tct_amd_disable 	.field     _TCT_Control_Interrupts+0,32");
     asm("	                .global	   _TCT_Control_Interrupts");
+#endif
 }
 
 void amd_int_enable(uint32 cpsr)
 {
+#ifdef __GNUC__
+	return NU_Control_Interrupts(cpsr);
+#else
     asm("        .state16");
     asm("        ldr       A2, tct_amd_enable");
     asm("        bx        A2      ");
 
     asm("tct_amd_enable 	.field     _TCT_Control_Interrupts+0,32");
     asm("	                .global	   _TCT_Control_Interrupts");
+#endif
 }
 
 // Even though we have this end label, we cannot determine the number of
 // constant/PC-relative data following the code!
+#ifdef __GNUC__
+asm(".globl ffsdrv_ram_amd_end");
+asm("ffsdrv_ram_amd_end:");
+#else
 asm("        .state32");
 asm("        .label _ffsdrv_ram_amd_end");
 asm("        .def   _ffsdrv_ram_amd_end");
+#endif
--- a/src/cs/drivers/drv_app/ffs/board/drv.c	Tue Jul 17 18:17:27 2018 +0000
+++ b/src/cs/drivers/drv_app/ffs/board/drv.c	Thu Jul 19 00:35:33 2018 +0000
@@ -1423,6 +1423,9 @@
 
 uint32 int_disable(void)
 {
+#ifdef __GNUC__
+	return NU_Control_Interrupts(0xC0);
+#else
     asm("        .state16");
     asm("        mov       A1, #0xC0");
     asm("        ldr       A2, tct_disable");
@@ -1430,16 +1433,21 @@
 
     asm("tct_disable    .field     _TCT_Control_Interrupts+0,32");
     asm("	            .global	   _TCT_Control_Interrupts");
+#endif
 }
 
 void int_enable(uint32 cpsr)
 {
+#ifdef __GNUC__
+	return NU_Control_Interrupts(cpsr);
+#else
     asm("        .state16");
     asm("        ldr       A2, tct_enable");
     asm("        bx        A2      ");
 
     asm("tct_enable 	.field     _TCT_Control_Interrupts+0,32");
     asm("	            .global	   _TCT_Control_Interrupts");
+#endif
 }
 
 #else
--- a/src/cs/drivers/drv_app/ffs/board/intelsbdrv.c	Tue Jul 17 18:17:27 2018 +0000
+++ b/src/cs/drivers/drv_app/ffs/board/intelsbdrv.c	Thu Jul 19 00:35:33 2018 +0000
@@ -13,6 +13,7 @@
 #include "ffs/ffs.h"
 #include "ffs/board/drv.h"
 #include "ffs/board/ffstrace.h"
+#include "nucleus.h"
 
 
 #define INTEL_UNLOCK_SLOW 1
@@ -28,8 +29,13 @@
 #define FLASH_READ(addr)        (*(volatile uint16 *) (addr))
 #define FLASH_WRITE(addr, data) (*(volatile uint16 *) (addr)) = data
 
+#ifdef __GNUC__
+asm(".globl ffsdrv_ram_intel_begin");
+asm("ffsdrv_ram_intel_begin:");
+#else
 asm("        .label _ffsdrv_ram_intel_begin");
 asm("        .def   _ffsdrv_ram_intel_begin");
+#endif
 
 uint32 intel_int_disable(void);
 void intel_int_enable(uint32 tmp);
@@ -222,6 +228,9 @@
 
 uint32 intel_int_disable(void)
 {
+#ifdef __GNUC__
+	return NU_Control_Interrupts(0xC0);
+#else
     asm("        .state16");
     asm("        mov       A1, #0xC0");
     asm("        ldr       A2, tct_intel_disable");
@@ -229,20 +238,30 @@
 
     asm("tct_intel_disable 	.field     _TCT_Control_Interrupts+0,32");
     asm("	                .global	   _TCT_Control_Interrupts");
+#endif
 }
 
 void intel_int_enable(uint32 cpsr)
 {
+#ifdef __GNUC__
+	return NU_Control_Interrupts(cpsr);
+#else
     asm("        .state16");
     asm("        ldr       A2, tct_intel_enable");
     asm("        bx        A2      ");
 
     asm("tct_intel_enable 	.field     _TCT_Control_Interrupts+0,32");
     asm("	                .global	   _TCT_Control_Interrupts");
+#endif
 }
 
 // Even though we have this end label, we cannot determine the number of
 // constant/PC-relative data following the code!
+#ifdef __GNUC__
+asm(".globl ffsdrv_ram_intel_end");
+asm("ffsdrv_ram_intel_end:");
+#else
 asm("        .state32");
 asm("        .label _ffsdrv_ram_intel_end");
 asm("        .def   _ffsdrv_ram_intel_end");
+#endif