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comparison src/cs/layer1/tpu_drivers/source0/tpudrv12.c @ 153:df9c471ce9e9

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l1_rf12.c and tpudrv12.[ch]: updates from Magnetite
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 10 Mar 2019 20:28:06 +0000
parents b6a5e36de839
children
comparison
equal deleted inserted replaced
152:d3668a47b969 153:df9c471ce9e9
777 void l1dmacro_RF_sleep (void) 777 void l1dmacro_RF_sleep (void)
778 { 778 {
779 TSP_TO_RF(0x0002); 779 TSP_TO_RF(0x0002);
780 *TP_Ptr++ = TPU_MOVE(TSP_ACT, RF_SER_ON); 780 *TP_Ptr++ = TPU_MOVE(TSP_ACT, RF_SER_ON);
781 *TP_Ptr++ = TPU_WAIT(1); 781 *TP_Ptr++ = TPU_WAIT(1);
782 /* by happenstance, no change is needed for Pirelli DP-L10 here */
782 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x21); 783 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x21);
783 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x02); 784 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x02);
784 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, TC1_DEVICE_RF | 0x01); 785 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, TC1_DEVICE_RF | 0x01);
785 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, TC2_WR); 786 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, TC2_WR);
786 *TP_Ptr++ = TPU_WAIT(100); 787 *TP_Ptr++ = TPU_WAIT(100);
798 799
799 /* Rita version differs from LoCosto, reconstructing from disassembly */ 800 /* Rita version differs from LoCosto, reconstructing from disassembly */
800 void l1dmacro_RF_wakeup (void) 801 void l1dmacro_RF_wakeup (void)
801 { 802 {
802 TP_Ptr = (SYS_UWORD16 *) TPU_RAM; 803 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
803 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x01); 804 /*
805 * Change from TI's original code, needed for Pirelli DP-L10:
806 * configure TSPEN1 (upper nibble of TSP_SPI_SET1) for Rita just like
807 * the original TSPEN2 config (lower nibble of TSP_SPI_SET2).
808 * This change does not affect classic TI/OM/FC or Compal platforms
809 * as they don't use TSPEN1.
810 */
811 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x61);
804 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06); 812 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06);
805 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, TC1_DEVICE_RF | 0x01); 813 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, TC1_DEVICE_RF | 0x01);
806 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, TC2_WR); 814 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, TC2_WR);
807 *TP_Ptr++ = TPU_WAIT(100); 815 *TP_Ptr++ = TPU_WAIT(100);
808 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down | RF_SER_ON); 816 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down | RF_SER_ON);
868 876
869 *TP_Ptr++ = TPU_AT(t); 877 *TP_Ptr++ = TPU_AT(t);
870 *TP_Ptr++ = TPU_SYNC(0); 878 *TP_Ptr++ = TPU_SYNC(0);
871 879
872 /* from disassembly, differs from LoCosto version */ 880 /* from disassembly, differs from LoCosto version */
873 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x20); 881 /*
882 * Change from TI's original code, needed for Pirelli DP-L10:
883 * configure TSPEN1 (upper nibble of TSP_SPI_SET1) for Rita just like
884 * the original TSPEN2 config (lower nibble of TSP_SPI_SET2).
885 * This change does not affect classic TI/OM/FC or Compal platforms
886 * as they don't use TSPEN1.
887 */
888 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x60);
874 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06); 889 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06);
875 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET3, 0x00); 890 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET3, 0x00);
876 891
877 t = 1000; // arbitrary start time 892 t = 1000; // arbitrary start time
878 893