FreeCalypso > hg > fc-magnetite
comparison targets/dsp34test.conf @ 619:5a0ddb29c58e
targets/dsp34test.{conf,h} created for DSP 34 experiments
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Sun, 06 Oct 2019 22:25:10 +0000 |
| parents | |
| children |
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| 618:ed403a239ec6 | 619:5a0ddb29c58e |
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| 1 # TI's TCS211 program supported 3 different Calypso silicon versions on their | |
| 2 # D-Sample and Leonardo boards: C05B (CHIPSET 8, DSP 33), early C035 | |
| 3 # (CHIPSET 10, DSP 34) and final C035 (CHIPSET 10, DSP 36). In FreeCalypso | |
| 4 # we generally work only with the last chipset (final C035), but we would like | |
| 5 # to support the two earlier ones as well, if possible. C05B has been partially | |
| 6 # exercised on the Mother's D-Sample board (non-functional Clara RF, no genuine | |
| 7 # tpudrv10.c source and too many unknowns), but the early C035 version with | |
| 8 # DSP 34 has not been tested at all yet. | |
| 9 # | |
| 10 # The Mother plans on testing the early C035 version of Calypso by populating | |
| 11 # a D751774A chip on an FCDEV3B and trying out the resulting combination; | |
| 12 # the present dsp34test fw build is to be flashed into those modified FCDEV3B | |
| 13 # boards. | |
| 14 | |
| 15 CHIPSET=10 | |
| 16 DSP=34 | |
| 17 RF=12 | |
| 18 LINK_SCRIPT_SRC=src/cs/system/template/gsm_ds_pirelli_flash.template | |
| 19 RAM_LINK_SCRIPT_SRC=src/cs/system/template/gsm_ds_pirelli_ram.template | |
| 20 FLASH_BASE_ADDR=0 | |
| 21 FLASH_SECTOR_SIZE=0x40000 |