FreeCalypso > hg > fc-magnetite

annotate src/cs/drivers/drv_core/armio/armio.c @ 600:8f50b202e81f

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board preprocessor conditionals: prep for more FC hw in the future This change eliminates the CONFIG_TARGET_FCDEV3B preprocessor symbol and all preprocessor conditionals throughout the code base that tested for it, replacing them with CONFIG_TARGET_FCFAM or CONFIG_TARGET_FCMODEM. These new symbols are specified as follows: CONFIG_TARGET_FCFAM is intended to cover all hardware designs created by Mother Mychaela under the FreeCalypso trademark. This family will include modem products (repackagings of the FCDEV3B, possibly with RFFE or even RF transceiver changes), and also my desired FreeCalypso handset product. CONFIG_TARGET_FCMODEM is intended to cover all FreeCalypso modem products (which will be firmware-compatible with the FCDEV3B if they use TI Rita transceiver, or will require a different fw build if we switch to one of Silabs Aero transceivers), but not the handset product. Right now this CONFIG_TARGET_FCMODEM preprocessor symbol is used to conditionalize everything dealing with MCSI. At the present moment the future of FC hardware evolution is still unknown: it is not known whether we will ever have any beyond-FCDEV3B hardware at all (contingent on uncertain funding), and if we do produce further FC hardware designs, it is not known whether they will retain the same FIC modem core (triband), if we are going to have a quadband design that still retains the classic Rita transceiver, or if we are going to switch to Silabs Aero II or some other transceiver. If we produce a quadband modem that still uses Rita, it will run exactly the same fw as the FCDEV3B thanks to the way we define TSPACT signals for the RF_FAM=12 && CONFIG_TARGET_FCFAM combination, and the current fcdev3b build target will be renamed to fcmodem. OTOH, if that putative quadband modem will be Aero-based, then it will require a different fw build target, the fcdev3b target will stay as it is, and the two targets will both define CONFIG_TARGET_FCFAM and CONFIG_TARGET_FCMODEM, but will have different RF_FAM numbers. But no matter which way we are going to evolve, it is not right to have conditionals on CONFIG_TARGET_FCDEV3B in places like ACI, and the present change clears the way for future evolution.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 01 Apr 2019 01:05:24 +0000
parents 9b81b68e8e64
children 92dbfa906f66
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945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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1 /*
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2 * ARMIO.C
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3 *
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4 *
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5 * Control diagnostic bits
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6 *
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7 * Reference : GCS207
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8 *
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9 */
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10
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11
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12 #include "l1sw.cfg"
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13 #include "swconfig.cfg"
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14 #ifdef BLUETOOTH_INCLUDED
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15 #include "btemobile.cfg"
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16 #endif
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17 #if (OP_L1_STANDALONE == 1)
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18 #include "l1_macro.h"
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19 #include "l1_confg.h"
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20 #endif
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21 #include "board.cfg"
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22 #include "chipset.cfg"
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23 #include "fc-target.cfg"
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24
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25 #if (OP_L1_STANDALONE == 0)
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26 #include "main/sys_types.h"
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27 #else
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28 #include "sys_types.h"
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29 #endif
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30
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31
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32 #include "memif/mem.h"
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33
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34 #include "inth/iq.h"
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35 #include "armio/armio.h"
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36 #include "abb/abb.h" // for AI_Power function : to be removed, use ABB_Power_Off in abb.c file instead !!!
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37
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38 #if (CHIPSET != 12)
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39 /*
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40 * AI_EnableBit
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41 *
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42 * Enable ARMIO input/output bit (see CLKM module specification)
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43 */
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44 void AI_EnableBit(int bit)
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45 {
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46 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) |= (1<<bit);
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47 }
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48
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49 /*
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50 * AI_DisableBit
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51 *
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52 * Disable ARMIO input/output bit (see CLKM module specification)
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53 */
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54 void AI_DisableBit(int bit)
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55 {
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56 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) &= ~(1<<bit);
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57 }
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58
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59 #endif /* CHIPSET != 12 */
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60
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61 /*
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62 * AI_SetBit
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63 *
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64 * Switch-on one bit
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65 */
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66 void AI_SetBit(int bit)
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67 {
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68 *((volatile SYS_UWORD16 *) ARMIO_OUT) |= (1<<bit);
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69 }
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70
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71 /*
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72 * AI_ResetBit
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73 *
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74 * Switch-off one bit
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75 */
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76 void AI_ResetBit(int bit)
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77 {
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78 *((volatile SYS_UWORD16 *) ARMIO_OUT) &= ~(1<<bit);
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79 }
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80
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81 /*
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82 * AI_ConfigBitAsOutput
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83 *
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84 * Set this bit as an output
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85 */
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86 void AI_ConfigBitAsOutput(int bit)
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87 {
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88 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) &= ~(1<<bit);
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89 }
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90
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91 /*
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92 * AI_ConfigBitAsInput
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93 *
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94 * Set this bit as an input
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95 */
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96 void AI_ConfigBitAsInput(int bit)
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97 {
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98 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) |= (1<<bit);
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99 }
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100
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101
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102 /*
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103 * AI_ReadBit
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104 *
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105 * Read value in register
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106 */
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107 SYS_BOOL AI_ReadBit(int bit)
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108 {
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109 if ((*((volatile SYS_UWORD16 *) ARMIO_IN)) & (1<<bit))
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110 return (1);
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111 else
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112 return (0);
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113 }
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114
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115 /*
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116 * AI_Power
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117 *
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118 * Switch-on or off the board
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119 *
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120 * Parameters : SYS_UWORD8 power: 1 to power-on (maintain power)
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121 * 0 to power-off
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122 *
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123 */
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124 #if (OP_L1_STANDALONE == 0)
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125 void AI_Power(SYS_UWORD8 power)
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126 {
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127 if (power == 0)
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128 {
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129 ABB_Power_Off();
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130 }
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131 }
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132 #endif
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133
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134 /*
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135 * AI_ResetIoConfig
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136 *
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137 * Reset all default IO configurations
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138 *
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139 */
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140 void AI_ResetIoConfig(void)
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141 {
84
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142 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0xFFFF; // all bits are inputs
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143 #if (CHIPSET != 12)
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144 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) = 0; // default config
0
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145 #endif /* CHIPSET != 12 */
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146 }
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147
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148
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149 /*
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150 * AI_ClockEnable
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151 *
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152 * Enable ARMIO clock module
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153 *
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154 */
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155 void AI_ClockEnable(void)
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156 {
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157 *((volatile SYS_UWORD16 *) ARMIO_CNTL_REG) |= ARMIO_CLOCKEN; // set to 1 bit 5
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158 }
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159
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160
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161 /*
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162 * AI_InitIOConfig
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163 *
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164 * Configure all GPIOs at initialization in order to optimize the power consumption
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165 * of the C-Sample :
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166 * - select IOs 8,9,10,11,12 and 13 on the pins instead of MCSI and MCUEN signals.
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167 * - configure these IOs in output high.
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168 * - configure the IOs 0 (Vibrator LED) and 1 (LCD_A0) in output low.
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169 */
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170 void AI_InitIOConfig(void)
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171 {
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172 // reset the IOs config
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173 AI_ResetIoConfig();
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174
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175 // CLKM_IO_CNTL register configuration :
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176 // select IOs 6,8,9,10,11,12 and 13 on the pins instead of MCSI and MCUEN signals.
83
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177 AI_EnableBit(0); /* FreeCalypso addition */
0
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178 AI_EnableBit(2);
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179 AI_EnableBit(4);
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180
84
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181 #ifdef CONFIG_TARGET_PIRELLI
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182 AI_EnableBit(1);
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183 AI_EnableBit(3);
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184 #endif
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185
0
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186 /* Bits 5,6,7,8 are used to output I/O 9,10,11,12 or MCSI pins */
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187 /* If Bluetooth, IO should be disabled, outputting MCSI used for Bluetooth voice */
242
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188 /*
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189 * FreeCalypso change: we don't have BT, our new criterion is
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190 * whether or not a given board is wired for MCSI.
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191 */
600
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192 #if defined(CONFIG_TARGET_FCMODEM) || defined(CONFIG_TARGET_PIRELLI)
81
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193 AI_DisableBit(5);
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194 AI_DisableBit(6);
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195 AI_DisableBit(7);
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196 AI_DisableBit(8);
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197 #else
81
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198 AI_EnableBit(5);
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199 AI_EnableBit(6);
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200 AI_EnableBit(7);
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201 AI_EnableBit(8);
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202 #endif
0
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203
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204 AI_EnableBit(9);
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205
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206 // ARMIO_OUT register configuration :
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207 // set IOs 8,9,10,11,12 and 13 as high
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208 // set IOs 0 to 7 as low
84
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209
534
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210 #ifdef CONFIG_TARGET_C11X
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211 /* C11x GPIO configuration mimics what the original fw sets */
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212
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213 /* GPIO out all zeros */
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214 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000;
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215
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216 /* setting of GPIOs as outputs: register setting from the original fw */
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217 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0x2209;
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218
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219 #elif defined(CONFIG_TARGET_C139)
84
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220 /* C139 GPIO configuration mimics what the original fw sets */
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221
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222 /* GPIO out all zeros - the LCD backlight is OFF */
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223 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000;
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224
534
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225 /* setting of GPIOs as outputs: register setting from the original fw */
84
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226 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0x2A09;
533
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227
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228 #elif defined(CONFIG_TARGET_C155)
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229 /* C155 GPIO config based on the available schematics */
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230
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231 /* GPIO out all zeros - the LCD backlight is OFF */
84
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232 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000;
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233
533
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234 AI_ConfigBitAsOutput(1); /* LCD backlight control */
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235 AI_ConfigBitAsOutput(2); /* headset jack switch */
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236 AI_ConfigBitAsOutput(3); /* LCDA0 (?) */
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diff changeset
237 AI_ConfigBitAsOutput(8); /* MUSIC_A0 */
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diff changeset
238 AI_ConfigBitAsOutput(12); /* MUSIC_ON */
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diff changeset
239
588
f2e752052db5 beginning of SE J100 target support
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diff changeset
240 #elif defined(CONFIG_TARGET_J100)
589
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diff changeset
241 /*
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diff changeset
242 * GPIO config on this target is based on the disassembly of
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243 * Init_Target() and AI_InitIOConfig() functions in the official fw.
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244 */
588
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245
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246 /* GPIO out all zeros - the LCD backlight is OFF */
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247 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000;
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248
589
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249 /* setting of GPIOs as outputs: register setting from the original fw */
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250 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0x2A59;
588
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251
533
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252 #elif defined(CONFIG_TARGET_PIRELLI)
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253
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254 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000;
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255
09afc37e8069 armio.c: added support for C155 target
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256 AI_ConfigBitAsOutput(1);
84
42d766231c46 armio.c: support for C139 and Pirelli targets
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257 AI_ConfigBitAsOutput(4);
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258 AI_ConfigBitAsOutput(7);
533
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diff changeset
259
84
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260 #else /* classic TI/Openmoko/FreeCalypso targets */
0
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261 // set IOs 1 and 8 to 13 as high
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262 // set IOs 0 and 2 to 7 as low
409
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263 // On D-Sample GPIO 1 must be set to high to enable the audio amplifier,
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264 // but on Openmoko's modem it is the interrupt to the AP.
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265 // On the FCDEV3B it also controls the audio amplifier.
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266 // For now we initialize it to low on all targets.
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diff changeset
267 #if 1
0
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268 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F00;
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269 #else
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270 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F02;
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271 #endif
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272
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273 // ARMIO_CNTL_REG register configuration :
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274 // set IOs 1,2,5,7,9,14 and 15 as ouputs.
600
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275 // bits conditionalized on CONFIG_TARGET_GTAMODEM or CONFIG_TARGET_FCFAM
532
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276 // are FreeCalypso additions
600
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277 #if defined(CONFIG_TARGET_GTAMODEM) || defined(CONFIG_TARGET_FCFAM)
532
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278 AI_ConfigBitAsOutput(0);
409
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279 #endif
533
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280 AI_ConfigBitAsOutput(1);
0
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281 AI_ConfigBitAsOutput(2);
285
504c9dcbffb2 GTA0x target: GPIOs 3, 10, 11 and 12 are unconnected, so drive them as outputs
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282 #ifdef CONFIG_TARGET_GTAMODEM
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283 AI_ConfigBitAsOutput(3);
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284 #endif
600
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285 #if defined(CONFIG_TARGET_GTAMODEM) || defined(CONFIG_TARGET_FCFAM)
532
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286 AI_ConfigBitAsOutput(4);
409
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287 #endif
0
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288 AI_ConfigBitAsOutput(5);
600
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289 #if defined(CONFIG_TARGET_GTAMODEM) || defined(CONFIG_TARGET_FCFAM)
532
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diff changeset
290 AI_ConfigBitAsOutput(6);
409
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diff changeset
291 #endif
0
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292 AI_ConfigBitAsOutput(7);
600
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293 #if defined(CONFIG_TARGET_GTAMODEM) || defined(CONFIG_TARGET_FCFAM)
532
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diff changeset
294 AI_ConfigBitAsOutput(8);
409
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diff changeset
295 #endif
0
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296 AI_ConfigBitAsOutput(9);
285
504c9dcbffb2 GTA0x target: GPIOs 3, 10, 11 and 12 are unconnected, so drive them as outputs
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diff changeset
297 #ifdef CONFIG_TARGET_GTAMODEM
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298 AI_ConfigBitAsOutput(10);
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diff changeset
299 AI_ConfigBitAsOutput(11);
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diff changeset
300 AI_ConfigBitAsOutput(12);
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diff changeset
301 #endif
600
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diff changeset
302 #if defined(CONFIG_TARGET_GTAMODEM) || defined(CONFIG_TARGET_FCFAM)
532
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diff changeset
303 AI_ConfigBitAsOutput(13);
409
6c3f68021c53 armio.c: GPIO directions restored to TI's original on the D-Sample
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diff changeset
304 #endif
0
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305 AI_ConfigBitAsOutput(14);
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306 AI_ConfigBitAsOutput(15);
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diff changeset
307 #endif
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308 }
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309
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310 /*
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311 * AI_SelectIOForIT
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diff changeset
312 *
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313 * Select which IO will be used to generate an interrupt.
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314 * 'Edge' specifies if interrup must be detected on falling or rising edge.
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diff changeset
315 *
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316 * Warning: parameters are not checked.
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diff changeset
317 */
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318
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diff changeset
319 void AI_SelectIOForIT (SYS_UWORD16 Pin, SYS_UWORD16 Edge)
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diff changeset
320 {
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diff changeset
321 #if (CHIPSET == 12)
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322 /*
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diff changeset
323 * Update INTERRUPT_LEVEL_REG with Edge configuration on Pin selection
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
324 */
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diff changeset
325 GPIO_INTERRUPT_LEVEL_REG = (Edge & 0x0001) << Pin;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
326
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff changeset
327 /*
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
328 * Update INTERRUPT_MASK_REG to enable interrupt generation on Pin selection
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
329 */
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diff changeset
330 GPIO_INTERRUPT_MASK_REG = 1 << Pin;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
331 #else
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diff changeset
332 /*
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
333 * Bit SET_GPIO_EVENT_MODE (bit 0) is set to enable the GPIO event mode.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
334 */
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parents:
diff changeset
335
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
336 *((volatile SYS_UWORD16 *) ARMIO_GPIO_EVENT_MODE) = (Pin << 1) + (Edge << 5) + 1;
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diff changeset
337 #endif
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
338 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
339
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
340 #if (CHIPSET != 12)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
341 /*
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff changeset
342 * AI_CheckITSource
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
343 *
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diff changeset
344 * Check if the interrupt specified by 'Source' is active or not.
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parents:
diff changeset
345 *
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diff changeset
346 * Output: 0: IT is not active
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff changeset
347 * 1: IT is active
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff changeset
348 *
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diff changeset
349 * Warning: parameters are not checked.
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parents:
diff changeset
350 *
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diff changeset
351 * Warning: If the keypad and GPIO interrupts may occur the GPIO interrupt
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diff changeset
352 * must be checked first because the GPIO status bit is reset when
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parents:
diff changeset
353 * the register is read.
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parents:
diff changeset
354 */
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diff changeset
355
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
356 int AI_CheckITSource (SYS_UWORD16 Source)
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diff changeset
357 {
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diff changeset
358 return (*((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_INT) & Source ? 1 : 0);
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diff changeset
359 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
360
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff changeset
361 /*
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
362 * AI_UnmaskIT
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
363 *
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
364 * Unmask the IT specified by 'Source' (keyboard or GPIO).
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff changeset
365 *
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diff changeset
366 * Warning: parameters are not checked.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff changeset
367 */
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parents:
diff changeset
368
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
369 void AI_UnmaskIT (SYS_UWORD16 Source)
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370 {
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371 *((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_MASKIT) &= ~Source;
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372 }
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373
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374 /*
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375 * AI_MaskIT
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376 *
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377 * Mask the IT specified by 'Source' (keyboard or GPIO).
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378 *
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379 * Warning: parameters are not checked.
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380 */
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381
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382 void AI_MaskIT (SYS_UWORD16 Source)
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383 {
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384 *((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_MASKIT) |= Source;
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385 }
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386 #endif /* CHIPSET != 12 */
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387
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388 #if (CHIPSET == 12)
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389
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390 void AI_MaskIT(SYS_UWORD16 d_io_number) {
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391 GPIO_INTERRUPT_MASK_REG |= (1 << d_io_number);
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392 } /* f_gpio_mask_it() */
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393
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394 void AI_UnmaskIT(SYS_UWORD16 d_io_number) {
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395 GPIO_INTERRUPT_MASK_REG &= ~(1 << d_io_number);
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396 } /* f_gpio_unmask_it() */
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397
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398 #endif