This OSDCU software release is intended to be the last for PCB rev 0.  The base
monitor configures TCLK2 as an input; the Layer 2 converting DSU applications
expect ECO 1 to have been applied.  This release supports the optional Altera
EPF10K30ATC144-2 FPGA; if this FPGA is used, ECO 2 must be applied as well.

The devpr directory contains U5 and U6 flash chip images which are to be
programmed using a device programmer when a new OSDCU board is being built.
These images don't include those software components which are specific to
FPGA-enabled boards; if you've populated the FPGA on your rev 0 board and
you've applied ECO 2, you can use the upload mechanism to add the extra files
from the components directory.  The HWCONF.TXT file needs to be added as well,
describing your specific board configuration.

The components directory contains all individual components of the OSDCU
software suite which can be loaded into a board that is at least somewhat
working.

The contents of the elf_files directory are self-explanatory.  These files are
included as a debugging aid, providing correspondence between the source code
and the compiled images.
