Work requisition: drawing graphical schematics for FCDEV3B ========================================================== We have a working product board called FCDEV3B, but currently there are no graphical schematics for this board because the design process was done in an unconventional manner. With most board designs a graphical schematic drawing is created first, and the netlist that drives the PCB layout program is generated from those graphical schematics - but our board was done differently. For our FCDEV3B the layout-driving netlist was generated from a Unix/Linux text-based (non-graphical) design suite called ueda, and the text-based source code for the board in ueda format serves the same function which is normally fulfilled by graphical schematics. The problem is now with user support. We have these boards successfully produced, can produce as many as needed, they work as designed, but we have no graphical schematics for user support. The source code for the board in ueda format (non-graphical "schematic" equivalent) is published on our support FTP site, but no one other than me (Mother Mychaela) can understand it. Whenever I have to teach a user or prospective customer how to use our boards effectively, I frequently find myself wishing that I could point them to a schematic which they could readily understand - but we don't have one. We are now seeking to hire a schematic artist who can draw graphical schematics that would correspond to our board as it already exists, i.e., as-built schematics. Notice my choice of words: we need a schematic artist, not an EE per se, because the job is to produce a graphical depiction of an already existing circuit which is currently described textually, as opposed to designing anything new. Possible approaches =================== Our FCDEV3B is a derivative work based on two pre-existing designs: a reference board called Leonardo once made by TI and another board called GTA02 (a smartphone motherboard) by Openmoko. Most aspects of our FCDEV3B are already depicted quite well on either Leonardo or GTA02 schematics (some on one, some on the other, some on both), hence I would like to copy and adapt these existing graphical depictions of certain parts of our circuit. The following 3 approaches are thus possible: 1) One can start with Leonardo schematics in OrCAD format, keep the parts that are common between Leonardo and FCDEV3B, remove those parts which don't exist on FCDEV3B, and manually redraw those parts which came from GTA02. 2) One can start with GTA02 schematics in PADS Logic format, remove everything other than the GSM modem (the only part we took from GTA02), renumber most of the reference designators, and manually redraw those peripheral circuits which came from Leonardo. 3) One can create an entirely new from-scratch drawing in some tool that is neither OrCAD nor PADS Logic (for example, a FOSS schematic drawing program like gschem that has neither OrCAD nor PADS Logic import capability), and manually redraw everything, using both Leonardo and GTA02 schematics as visual sources as appropriate. For us it doesn't matter which approach our hired schematic artist will choose, nor does it matter which schematic drawing program he or she uses - the only end product we seek is a PDF schematic drawing which we can publish on our support FTP site. But if you are looking to take on this schematic drawing job, here are some considerations to help you select the best approach: * The baseband core and parts of the RF section are essentially identical across all 3 of Leonardo, GTA02 and FCDEV3B - this part of GTA02 was derived from Leonardo. However, all reference designators have been renumbered by Openmoko in going from Leonardo to GTA02, i.e., those two schematics use completely different refdes numbering plans for the same circuit. On our FCDEV3B we use the Leonardo refdes numbering plan, hence it would be easier to copy and adapt this part of the drawing from Leonardo schematics. Copying and adapting from GTA02 schematics would be possible too, but would require renumbering every refdes in this section back to the Leonardo refdes plan. * All peripheral circuits on FCDEV3B (everything outside the 40x30 mm modem core taken from GTA02) originate from Leonardo, thus only Leonardo schematics can serve as the source for this part, whether by importation from OrCAD or by manual redrawing. * The memory circuit and certain parts of the RF section are different between Leonardo and GTA02, and on FCDEV3B we have the version from GTA02 by virtue of having preserved it at the level of physical layout. Thus GTA02 schematics will need to be used as the reference for these parts. The specific version of Leonardo schematics used as the reference here is this version, in both OrCAD DSN and PDF formats: ftp://ftp.freecalypso.org/pub/GSM/Calypso/Leonardo_rev05.dsn ftp://ftp.freecalypso.org/pub/GSM/Calypso/Leonardo_rev05.pdf The 5 pages of this Leonardo_rev05 drawing carry over to FCDEV3B as follows: * Page 1 (top interconnect) and page 2 (baseband core chipset) carry over to FCDEV3B quite naturally, i.e., would need only some straightforward changes. * Page 3 depicts Leonardo peripherals; some of these peripherals exist on FCDEV3B (thus the corresponding schematic blocks will need to be either copied and adapted or redrawn), others don't exist on our board and would need to be removed. This Leonardo schematic page also depicts this Leonardo version of the memory circuit, but ours is totally different, coming from GTA02 instead. * Page 4 depicts the RF section. Our FCDEV3B RF section (GTA02-based) is different from Leonardo in a few significant aspects, but some other (also significant) parts have been left unchanged from Leonardo by Openmoko, thus the Leonardo RF page can still serve as a reasonable starting point. * Page 5 depicts Leonardo board shieldcan structure and grounding; this page should be dropped if our FCDEV3B schematics will be derived from this Leonardo version. The GTA02 schematic drawing serving as the other reference is this one: ftp://ftp.freecalypso.org/pub/GSM/GTA02/GTA02_Schematic_MB_A5_1220.pdf The exact corresponding PADS Logic SCH file is not known, but there are several different versions contained in this big dump: ftp://ftp.freecalypso.org/pub/GSM/GTA02/GTA02_design_files.zip I (Mother Mychaela) have only used the PDF version linked above as my reference. Out of this big and complex GTA02 schematic drawing, only pages 13 and 16 through 18 have any relevance, depicting the GSM modem section which we have copied; the rest would need to be deleted if this GTA02 schem drawing is to be used as the starting point. The pages of interest are as follows: * Page 13 is the top interconnect for the modem, approximately corresponding to Leonardo page 1. * Page 16 depicts the baseband chipset, approximately corresponding to Leonardo page 2. * Page 17 depicts the RF section; this page will need to be used as the reference for those aspects of FCDEV3B RF which originate from GTA02 and which are different from Leonardo. * Page 18 depicts the memory circuit; our FCDEV3B memory circuit is based on the GTA02 version with only minor changes, thus this GTA02 version will need to be used as the reference. Desired schematic structure =========================== The desired structure of the to-be-drawn schematics for FCDEV3B is similar to Leonardo: a 5-page drawing is desired as follows: * FCDEV3B schematic page 1 should be a top level interconnect diagram derived from Leonardo schematic page 1. * FCDEV3B schematic page 2 should be likewise derived from Leonardo schematic page 2, depicting the baseband chipset. * FCDEV3B schematic page 3 should depict the memory circuit, derived from GTA02 schematic page 18. * FCDEV3B schematic page 4 should depict the RF section, derived from Leonardo schematic page 4 and GTA02 schematic page 17. * FCDEV3B schematic page 5 should be derived from Leonardo schematic page 3, depicting those FCDEV3B peripherals which are derived from Leonardo, plus some new peripherals original to FCDEV3B which will need to be drawn from scratch. The subsequent detailed instructions in this document will assume this derivation, i.e., assume that FCDEV3B schematic pages 1, 2, 4 and 5 will be derived from Leonardo as above, and that page 3 and certain parts of page 4 will be derived from GTA02 schem, also per the above breakdown. FCDEV3B V1 vs. V2 ================= We have two versions of our FCDEV3B: first V1 designed in 2016 and physically produced in 2017, and then V2 designed in 2018 and physically produced in 2019. The difference is in the memory circuit, specifically in the way the flash reset line is driven. FCDEV3B V1 had this reset circuit left unchanged from GTA02, which Openmoko in turn did based on TI's reference design, driving the flash reset line with the FDP output from the Calypso. However, we are using a slightly newer flash chip than the ones called for in OM's GTA02 design, and this newer flash chip has more stringest reset timing requirements which Calypso's FDP output fails to satisfy. On FCDEV3B V2 we have removed the connection between this FDP output and the flash chip's reset input, and replaced it with a new reset circuit of Mother Mychaela's own invention. This new reset circuit produces timing which makes our Spansion S71PL129N flash chip happy. The new graphical schematics to be produced in this job should be drawn to match FCDEV3B V2; following the subsequent detailed instructions will produce FCDEV3B V2 schematics, not V1. Schematic style preference ========================== The Mother's preference is to use the rectangle symbol for resistors like on Leonardo schematics, not the zigzag symbol like on GTA02 schem. FCDEV3B schematic page 1 ======================== This page should be derived from Leonardo schematic page 1, either by editing Leonardo_rev05.dsn in OrCAD or by manually redrawing in a new schematic capture program such as gschem, using the Leonardo original as a visual reference in the latter case. The block structure on this page will need to change as follows: * The block named "Rita DB RF" on Leonardo_rev05 schem will need to be renamed to "Triband RF", preferably also annotated as "OM-based". * The block named "700 Miscellaneous" needs to be removed altogether. * The block named "Leonardo Base Band" will need to be renamed to "Baseband Chipset". * The block named "Peripherals" in the Leonardo version will need to be split into two blocks: a slightly smaller "Peripherals" block on the left and a new "Memory" block on the right. In the list of signals connected between "Leonardo Base Band" and "Peripherals" in the Leonardo version, the dividing line between the two new blocks should be placed between GPIO-8 and /CS2, currently found toward the right: everything to the left of and including GPIO-8 is Peripherals, everything to the right of and including /CS2 is Memory. Detailed interconnect changes ----------------------------- Connection between the new "Triband RF" and "Baseband Chipset" blocks: TSPACT05 and TSPACT06 signals need to be removed from the connected set, reflecting the physical reality that these signals are not wired anywhere on the PCB and are left unconnected on the Calypso BGA footprint U201. The ADIN-4 signal connects only between "Triband RF" and "Baseband Chipset" on our FCDEV3B, and thus should be disconnected from the "Peripherals" block. Connection between the "Baseband Chipset" and "Peripherals" blocks: the following signals (listed from left to right) should be removed from the connected set: VBATS, VCHG, VCCS, PCHG, LED-C, AUXON, AUXOP, AUXI, HSO, SDO, SCLK, SCS0_SCL, VBACKUP, ADIN-1, ADIN-2, LED-B, PWL, KBC[0:4], KBR[0:4], GPIO-0, GPIO-2, GPIO-6, RESETOUT_GPIO-7, GPIO-8, FDP For every one of the signals listed above, there is a corresponding ball pad on either U201 or U202 (both on the "Baseband Chipset" page), but there is nothing connected to these U201/U202 baseband signals on the FCDEV3B V2 PCB. They should be marked as disconnected on the baseband side, and removed from the Peripherals/Memory side. The opposite should be done for RTS and /CS2 signals: these two signals do connect to peripherals and memory, respectively, on our board. The following additional signals need to be connected between "Baseband Chipset" and "Peripherals": nEMU0 and nEMU1 (next to JTAG signals), CTS (next to RTS) and ON_nOFF (next to PWON). Furthermore, for FCDEV3B V2 the ON_nOFF signal from the Baseband block needs to connect not only to the Peripherals block, but also to the Memory block. Power rail connections ---------------------- The V-ABB power rail connection should be removed from the "Peripherals" block: none of FCDEV3B peripherals connect to it. The split between Peripherals and Memory affects power rail connections as follows: V-IO and VBAT go on the Peripherals side, whereas V-SRAM and V-FLASH go on the Memory side. Furthermore, for FCDEV3B V2 the V-DBB power rail also needs to be connected between Baseband and Memory. Additional touch-up ------------------- The nIBOOT signal connection needs to be removed from page 1 altogether, both from the Baseband side and from the Peripherals side. On the original Leonardo this nIBOOT signal was wired to two different resistor footprints (both pull-up and pull-down options) and also to the Delta production connector, and this arrangement is depicted on the Leonardo Peripherals page. But on both GTA02 and FCDEV3B the wiring of this nIBOOT signal is much simpler: there is no Delta production connector and no pull-up option, only a fixed pull-down resistor. To make this part of our FCDEV3B schematics more readable, I (Mother Mychaela) would like to move nIBOOT pull-down resistor to the Baseband Chipset page and thus eliminate it from the interpage connection set altogether. The following final changes need to be made to signal connections on the top right side of the "Baseband Chipset" block: - DSR_LPG Calypso ball pad is physically grounded on the PCB, and should be shown as such on the schematic drawing. My (Mother Mychaela's) recommendation is to remove this signal from the interpage connection set and to show it as grounded directly on the Baseband Chipset page. - HSL105 on the SDI_SDA signal needs to be changed to R106, which is a physical 0R on the FCDEV3B. Finally, I leave it up to the discretion of the schematic artist what should be done with all of the numerous baseband signals which are not connected anywhere: either show them as unconnected on the "Baseband Chipset" block on this top page, or remove them from this page altogether. FCDEV3B schematic page 2 ======================== This page should be derived from Leonardo schematic page 2, either by editing Leonardo_rev05.dsn in OrCAD or by manually redrawing in a new schematic capture program such as gschem, using the Leonardo original as a visual reference in the latter case. All IPxxx "interface point" symbols should be removed: none of them physically exist on the PCB, they just add noise to the schematic drawing, and many of these signals never leave the ball pad under the U201 or U202 BGA. Test point TP201 in the 32.768 kHz oscillator circuit should likewise be removed from the schematic drawing, as it does not physically exist on the PCB. Principal diffs between Leonardo and FCDEV3B: - Calypso signal CTS_MODEM is shown as grounded on Leonardo schematics, but needs to be brought off-page (connecting to the "Peripherals" page) on the FCDEV3B, as it goes to the DUART connector. - DSR_LPG right next to it needs to be shown as grounded. - ON_nOFF signal going from U202 to U201 also needs to be brought off-page, as it connects to other circuits on "Peripherals" and "Memory" pages. - JTAG auxiliary signals nEMU0 and nEMU1 (birectional) need to be brought to off-page connection symbols like the regular JTAG signals. - The connection between Calypso signal SIM_CD and the V-IO rail goes through a physical 0R on the FCDEV3B, reference designator R270. - VBACKUP connection and its associated bypass cap C222 do not exist on FCDEV3B (U202 ball E1 is left unconnected and not wired out at all), thus this part should be removed from the schematic drawing. - New test points: Leonardo test point symbol TP200 needs to be renamed to TP1 for FCDEV3B, and an additional test point symbol needs to be added on the nRESPWON net, with reference designator TP2. - nIBOOT pull-down resistor R328 should be moved from the Leonardo Peripherals page to this page, removing this signal from the interpage connection set. Part number, capacitor value and part annotation changes: - The Calypso part at U201 has changed from PD751992GHH to PD751992AGHH, i.e., the 'A' added between 751992 and GHH. The HERCROM400G2 designation remains the same. - The note on the Leonardo schematic page that reads "Hercrom40G2 intended only for first PCB built" and "To be replaced with Hercrom20G2" should be changed to: The Calypso part is PD751992AGHH on early board builds, changed to D751992AGHH on later board builds. The "PCB Footprint identical" part can remain as it is still true. - The Iota part at U202 has changed from TWL3014CGGM to TWL3025BGGM. - The crystal part at X201 has changed from MS1V-TK to MS2V-T1S - a slighly newer and physically smaller part. - The crystal part at X202 has likewise changed from SQ4D02600B2HNA-SM2 to NDK W-168-405, also a slightly newer and physically smaller part - but instead of showing this obscure part number on the schematic drawing, I would like to simply annotate it as "26 MHz". - The Pierce oscillator caps at C202 and C203 have changed from 10p to 22p. - Power bypass capacitor C214 (on the V-DBB rail) has been increased from 10 uF to 22 uF. The annotations around resistor packs R295 and R296 should be changed as follows: - The A/B/C/D letter designations for resistor slots should be reordered as follows: A = BULQM/BDLQM B = BULQP/BDLQP C = BULIM/BDLIM D = BULIP/BDLIP - R295 and R296 pin numbers should be removed from the published schematic drawing to prevent confusion: there is no universally agreed-upon standard for pin numbering on such components (or if there is one, it is too obscure and will probably be unknown to the target audience), thus anyone who cares about physical pin positions on these resistor packs should refer to PCB layout data. Finally, the original Leonardo version of this schematic page has a lot of net lines which connect Calypso or Iota signals to off-page connection symbols, and these signals are then connected to something on the Peripherals page. A lot of these Calypso and Iota signals are not connected anywhere at all on our FCDEV3B (the signals never leave the BGA pad under U201 or U202), and it would be nice to clean up the schematic drawing by removing these net lines for those signals which are actually unconnected. These signals are: * On the left side of the Calypso chip symbol: TSPACT05 and TSPACT06. * On the bottom side of the Calypso chip symbol: FDP is unconnected on FCDEV3B V2. * Along the top side of the Calypso chip symbol: SCLK, SDO, SCS0_SCL, SCS1, TXIR_RTS2, KBC[0:4], KBR[0:4], PWT, PWL, GPIO-0, GPIO-2, RESETOUT_GPIO-7. * On the right side of the Calypso chip symbol: GPIO-6, GPIO-8, GPIO-13. * On the top side of the Iota chip symbol: RPWON. * Along the right side of the Iota chip symbol: VBATS, ICTL, VCHG, VCCS, PCHG, ADIN-1, ADIN-2, DAC, LED-A, LED-B, LED-C, HSBIAS, HSMICP, HSO, AUXI, AUXOP, AUXON, VBACKUP. FCDEV3B schematic page 3 ======================== This page should be derived from GTA02 schematic page 18, most likely by manually redrawing it in whatever schematic capture program is used for this FCDEV3B schematic drawing job, using the GTA02 version as a visual reference. The following changes need to be applied to this schematic page in going from GTA02 to FCDEV3B: * Refdes renumbering: OM's U2000 became U301 on FCDEV3B, R2003 became R370, C2002 became C322, C2003 became C318. * The part annotation under U301 (former U2000) needs to be changed from S71PL129JB0BAW9Z0 to S71PL129NC0HFW4B. * The 2nd flash chip select is connected to /CS2 on our FCDEV3B, not to /CS4 as on Openmoko's PCB. * The table listing different possible flash chip types should NOT be copied, as it is not correct for our boards - the issue has been documented elsewhere. Instead this table should be replaced with the following notation: PCB footprint supports the following Spansion MCPs: S71PL032J, S71PL064J, S71PL129J and S71PL129N, all variations thereof. The standard populated part is S71PL129NC0HFW4B. The provided signal connections also support the option of populating Samsung K5A32xx parts, but the physical PCB footprint does not support those parts properly: they have additional no-connect solder balls in grid positions which our PCB footprint does not account for, thus forcing reliance solely on the PCB soldermask to prevent shorts. Additionally there is one more change between FCDEV3B V1 and V2 in this area. FCDEV3B V1 matches OM GTA02 in that the flash reset input is connected to Calypso FDP output (as depicted on Openmoko's schematics), but on FCDEV3B V2 this connection is removed and replaced with a different reset circuit. The new reset circuit consists of a single Nexperia 74AXP1T34 small IC, a logic voltage level translating buffer in Nexperia's SOT886 package, and it is wired as follows: PIN 1: V-DBB power rail (Vcci) PIN 2: A input: ON_nOFF signal from the "Baseband Chipset" block on page 2 PIN 3: GND PIN 4: Y output connected to the flash reset input PIN 5: no connect PIN 6: V-FLASH power rail (Vcco) The schematic artist will need to produce a new (from scratch) graphical depiction of what I have just described above. FCDEV3B schematic page 4 ======================== This page will need to depict the RF section of our FCDEV3B, and it will need to be derived from both Leonardo_rev05 page 4 and GTA02 schematic page 17. The Mother's preference is to start with the Leonardo_rev05 version as the baseline, then paste in the parts that originate from GTA02; the following instructions assume this approach. Let's begin with the minor edits which need to be applied to the Leonardo_rev05 version first: - Test or interface points IP600, IP601, IP602 and TP601 need to be removed from the drawing, as none of them physically exist on FCDEV3B. - A 0R jumper-resistor with reference designator R604 needs to be inserted into the XOEN net before the two capacitors C698 and C628. - R621 and R622 are physical 0R jumper-resistor components on FCDEV3B, not PCB shorts as suggested by Leonardo schematics, hence their schematic depiction needs to be changed to reflect this physical reality. - The part number annotation on U602 needs to be changed from "TRF6151BRGZR PG2.3" to TRF6151C. The more major changes from Leonardo to FCDEV3B are as follows: * The RFFE is different: various known Leonardo versions (both 2-band and 4-band) used integrated front end modules which internally combine the antenna switch and Rx SAW filters, whereas our OM-based triband RFFE consists of separate antenna switch and SAW filter components. * The control signals for our triband RFFE are likewise different from Leonardo 2-band and 4-band variants. * The RF PA has changed from Leonardo's AWT6108 or RF3133 to RF3166; the new PA eliminates the VREG3 connection and some external components. * The matching networks from the PA to the antenna switch and from the Rx SAW filter outputs to Rita LNA inputs are different between Leonardo and Openmoko; our FCDEV3B uses OM's versions because we have copied their complete modem core. For the PA change, the schematic symbol representing AWT6108 or RF3133 needs to be replaced with a different symbol representing RF3166; the new symbol can be copied from GTA02_Schematic_MB_A5_1220.pdf page 17. The following 4 pins of the old AWT6108/RF3133 have no counterparts on RF3166 and thus need to be removed from the drawing: VREG, VCC2_GSM, VCC_OUT and VCC2_DCS_PCS. The circuits connected to these pins on the Leonardo, including capacitors C649 and C650, also need to be removed from the drawing, as they don't exist on FCDEV3B. PA power supply bypass capacitor C654 is 22 uF on FCDEV3B (and on GTA02), not 4.7 uF as on Leonardo. Finally, the reference designator for the PA itself is U603 on our FCDEV3B, same as on quadband Leonardo versions, not U604 like on Leonardo_rev05. The orientation of chip attenuator components R600 and R601 is reversed between Leonardo_rev05 and FCDEV3B: for component R600 on our FCDEV3B the input needs to be pin 2 and the output needs to be pin 1, and for R601 it needs to be the other way around. The two matching networks from the PA to the antenna switch (one for the high bands, one for the low bands) are totally different between Leonardo and FCDEV3B. Leonardo components C646-C647 and C657-C660 (T networks) need to be removed from the drawing and replaced with the Pi networks depicted on Openmoko's version. All reference designators in these two Pi networks are renumbered for FCDEV3B: OM's C210-C214 are FCDEV3B C680-C684, and OM's L201 is FCDEV3B L680. The RFFE along with its control signals and Rx path matching networks is also totally different between Leonardo and FCDEV3B; to go from Leonardo_rev05 to a new schematic drawing that would match our FCDEV3B, apply changes as follows: - Remove Leonardo_rev05 components FE600, L602, L614-L615, L617-L618, C603, C644-C645, Q600A and Q600B. - Copy the 400 block from the GTA02 GSM RF schematic page (C401-C410, L401-L406, Q401-Q402, R401-R403, U401-U404) and plop in the place of those just-removed components. TSPACT01, TSPACT02 and TSPACT04 are wired exactly the same way on FCDEV3B as on GTA02. - Openmoko's C401 corresponds directly to Leonardo C635. On our FCDEV3B we use reference designator C401 for this component, but the capacitor value is 47 pF like on Leonardo, not 22 pF like on GTA02. - The ANTENNA trace coming out of the just-described capacitor goes directly to SMA connector J308 on FCDEV3B, i.e., the more complex arrangement used on GTA02 and depicted on Openmoko's schematics is not used on our board. There are two options for how SMA connector J308 may be depicted: Option 1: the ANTENNA signal coming out of C401 (corresponding to Leonardo C635) goes to an off-page connection symbol like on Leonardo schematics, the top level interconnect on page 1 connects it to the Peripherals page, and the actual SMA connector J308 is depicted on the latter page - this is the Leonardo way. Option 2: it would be equally acceptable to move J308 to the RF page and eliminate the interpage connection for the ANTENNA signal. I leave it up to the schematic artist which of these two options should be drawn. Additional touch-up ------------------- The part numbers given on GTA02_Schematic_MB_A5_1220.pdf page 17 for SAW filter components U402-U404 are wrong, both for FCDEV3B and for what Openmoko had actually populated on their GTA02 boards. The correct part numbers for FCDEV3B are as follows: * U402 is B7820 * U403 is B7821 * U404 is B7851 The table listing different RF Rx and Tx modes and the corresponding FEM or antenna switch control signals needs to be the version from GTA02, not the one from Leonardo_rev05. The following notation should be added near the depiction of Q401-Q402 and R401-R403: Resistor footprints R401-R403 are a legacy from Openmoko GTA02. They are physically present on the PCB, but they must not be populated. Populating these bypass resistors instead of the PNP transistors will produce a non-working circuit, as all standard firmwares expect the logic inversion provided by the PNP transistors. FCDEV3B schematic page 5 ======================== This page should be derived from Leonardo schematic page 3, either by editing Leonardo_rev05.dsn in OrCAD or by manually redrawing in a new schematic capture program such as gschem, using the Leonardo original as a visual reference in the latter case. Leonardo schematic page 3 depicts a bunch of peripherals which existed on the Leonardo but don't exist on FCDEV3B. The following blocks should be retained: * Along the top: the loudspeaker amplifier, the antenna connection and JTAG. * Along the bottom: the microphone circuit and the power input connector. * Out of the maze on the right, the only parts that stay are the SIM socket and PWON and RESET pushbuttons. The following blocks go away entirely: * LCM connector * Backup Battery * Keypad matrix * Vibration motor * J301 and J309 6-pin modular jacks * Charger for low-cost DC adapter * Combined charge, data and audio jack The following blocks have been moved elsewhere: * The memory circuit is quite different between Leonardo_rev05 and FCDEV3B, and our FCDEV3B version of this memory circuit now gets its own page, separate from Peripherals. * The Boot option block is reduced to just R328 on FCDEV3B, and this nIBOOT pull-down resistor is being moved to the Baseband Chipset page. The loudspeaker amplifier block changes as follows: - The label should be changed from "Melody amplifier" to "Loudspeaker amplifier": the primary use of this loudspeaker amplifier is for voice calls on the GSM network, whereas exercising the Melody E1 function in the Calypso DSP is only a secondary use. - The input comes only from EARP & EARN, not from AUXOP & AUXON. - The input resistors have changed from R337A & R337B to R351 & R352; they are discrete resistors, value 10 kOhm. - Feedback resistors R331 & R332 have changed from 22k to 18k. - C330 changed from n.m. to 1 uF. - C333, C334, HSP324 and HSP325 don't exist on the FCDEV3B. - SPK300 component has been replaced with two-post header J312 for the actual speaker connection; positive on pin 1. The JTAG block changes as follows: - Test points TP312-TP315 don't exist on FCDEV3B. - Resistor R361B has been omitted on FCDEV3B. - Calypso signals nEMU0 and nEMU1 are connected to J310 pins 13 and 14, respectively, passing through 0R resistors R315 and R317, respectively. - R362 and R363 are pull-ups to the V-IO rail on nEMU1 and nEMU0, respectively, placed on the side toward the Calypso, i.e., separated from the connector by R315 & R317 0Rs. The pull-up resistor value is 10 kOhm. - The marking "TSM-107-01-T-DV" should be removed from J310 - instead it is a "plain" 2.54mm 2x7 through-hole header on our board. The battery connector block changes as follows: - There is no ADIN-2 connection to the middle pin of the power input connector on FCDEV3B. - C301, C302, C303, HSP301 and HSP339 don't exist on FCDEV3B, only C323 is kept. The microphone circuit block changes as follows: - HSP309 does not exist on the FCDEV3B. - MIC300 component has been replaced with two-post header J313 for the actual microphone connection; positive on pin 1. The maze on the right side of the original Leonardo Peripherals page needs to be detangled as follows: - The 14-pin Delta production connector at refdes J307 needs to be removed along with the maze of connections going to it, as it does not exist on FCDEV3B. - The SIM socket block consisting of J302 and C306 is exactly the same between Leonardo and FCDEV3B, but C320, C321 and HSP302-HSP305 do not exist on FCDEV3B. - PWON and RESET pushbuttons at reference designators K301 and K304 are exactly the same between Leonardo and FCDEV3B. - A new FCDEV3B addition: there is a two-post header at reference designator JP1 wired in parallel with K301 for PWON control. - Neither S305 nor HSP340 exist on FCDEV3B, only K301 and JP1. - Only R328 nIBOOT pull-down resistor exists on FCDEV3B, i.e., the R327 pull-up option has not been reproduced on our board. The nIBOOT line connects only to R328 and nowhere else: no R327 and no Delta edge connector. - All of the test points depicted in the Leonardo maze need to be removed, as none of them exist on FCDEV3B. - Leonardo pull-up resistor R336 does not exist on FCDEV3B and thus needs to be removed from this part of the drawing. Our new resistor R101 has the same place in the board netlist as Leonardo R336, but it should be drawn with the rest of our dual UART interface circuit as described below. New FCDEV3B peripherals on page 5 ================================= There are 3 peripheral blocks on our FCDEV3B which are of our own original design and do not come from Leonardo: the dual UART bringout, the MCSI bringout and the switch-on status LED circuit. Because they are new with FreeCalypso, they do not appear anywhere on Leonardo or GTA02 schematics, thus their graphical schematic representation will need to be drawn from scratch. Dual UART bringout ------------------ The two Calypso UARTs are brought out on a 10-pin header (2.54mm 2x5) with the following pinout: Pin 1 = GND Pin 2 = GND Pin 3 = TX_IRDA Pin 4 = TX_MODEM Pin 5 = RX_IRDA Pin 6 = RX_MODEM Pin 7 = no connect Pin 8 = RTS_MODEM Pin 9 = no connect Pin 10 = CTS_MODEM The reference designator for this 10-pin header is J301. In addition to this header connector, the dual UART bringout circuit includes the following 4 resistors: * R101 is a 100 kOhm pull-up to V-IO on the RX_MODEM line; * R102 is an unpopulated resistor footprint for a pull-up to V-IO on the CTS_MODEM line; * R103 is a 100 kOhm pull-up to V-IO on the RX_IRDA line; * R108 is a 100 kOhm pull-down to GND on the CTS_MODEM line. MCSI bringout ------------- Calypso MCSI signals are brought out on a 5-pin header (2.54mm single row) with the following pinout: Pin 1 = MCSI_CLK Pin 2 = MCSI_RXD Pin 3 = MCSI_TXD Pin 4 = MCSI_FSYNCH Pin 5 = GND The reference designator for this 5-pin header is J311. There are 3 pull-down resistors to GND, all 3 populated, value 100 kOhm: * R104 on MCSI_CLK * R105 on MCSI_RXD * R107 on MCSI_FSYNCH MCSI_RXD is an input to Calypso, MCSI_TXD is a Calypso output, and the other two signals are bidirectional - the interpage connection symbols should reflect these signal directions. Switch-on status LED circuit ---------------------------- Calypso+Iota chipset internal signal ON_nOFF indicates the switched-on or switched-off state of the VRPC (voltage reference and power control) block. On our FCDEV3B we have an indicator LED that lights up when the baseband chipset is switched on. The circuit around this LED is as follows: VBAT rail | 470 Ohm resistor (R330) | Green LED (D309) | Si1032R N-channel MOSFET (Q309) | GND ON_nOFF signal from the Baseband Chipset block is connected to the gate of the MOSFET; the source is grounded and the drain goes to the cathode of the LED. Titleblocks and associated notations ==================================== If the new graphical schematics for FCDEV3B will be produced from Leonardo_rev05.dsn by editing in OrCAD, the various bits in the titleblock in the lower right corner of each page should be changed as follows: * TI's logo should be replaced with the new brand name FreeCalypso. * The name and address of TI Denmark to the right of that logo should be changed to the new board manufacturer's name and address as follows: Falconia Partners LLC 603 Seagaze Dr. PMB #284 Oceanside, CA 92054 USA * The parts in italics should be dropped - they may have applied in the past to TI's documents, but they do not apply to the new FreeCalypso documentation product being created here. * In the "Title" section the first line should read "FCDEV3B V2", and the second line should contain the name of each individual page as appropriate. * We don't have anything to put in the "Document Number" field. * The "Modified by" field can proudly display the name of the schematic artist making the new drawings. * The "Rev" field should read "V2". * The "Date" field should be set to the date when the new drawing is created. * The block of text toward the left that reads "PRELIMINARY documents..." should be changed to read: The circuit depicted in this schematic drawing is a derivative work containing contributions by Texas Instruments, Openmoko Inc. and Mychaela N. Falconia. All 3 contributors retain their respective moral rights to this GSM modem design. This schematic document is being published for product support purposes, and its publication does NOT grant manufacturing rights to arbitrary third parties. Anyone who wishes to manufacture hardware products on the basis of this design, with or without modifications, must obtain an explicit license from the creators. If the new graphical schematics for FCDEV3B will be drawn from scratch instead of editing Leonardo_rev05.dsn in OrCAD, then any other reasonable titleblock structure may be used, as long as all essential information is there.