The original FreeCalypso project plan was to proceed directly to building a
quadband design based on the Leonardo schematics found on 52rd.com in 2011,
redoing the layout almost entirely anew based on those schematics.  This plan
has been revised in favor of a more conservative one: our first development
board will be based on a direct reuse of the known-working GTA02 modem PCB
layout from Openmoko, which necessarily includes copying Om's RF front end
which is only triband rather than quadband.

This package contains a BOM+netlist design that exactly matches Openmoko's
modem in the core and features all of the peripherals we would like to have on
our development board.

There are no graphical schematics for this board design; the design has been
captured in a text-based design entry language based on the structural subset
of Verilog instead of graphics.  The structural Verilog source files from which
the board netlist has been compiled can be found in the vsrc and vsrc_ext
subdirectories; the vsrc directory contains those modules which capture
circuits contained in the core section (the one that is a copy of Openmoko's
GTA02 modem), whereas the vsrc_ext directory contains those modules which
capture peripheral circuits added outside of that core.  The file named MCL is
the Master Component List; it lists all components on the entire board.

The netlist for the board is compiled from structural Verilog sources and the
MCL in 3 stages:

sverp.unet:	This netlist is generated from the structural Verilog sources
		alone, without considering the MCL;

bound.unet:	This netlist is the result of binding sverp.unet to the MCL;

nostar.unet:	This is the final netlist; it is generated from bound.unet by a
		program that removes the 3 star connection points found in the
		core section and flattens them into a single net.  (These star
		connection points would be significant if one were doing an
		entirely new PCB layout based on this netlist, but in the
		present case we are reusing a ready-made layout for that
		section of the PCB, and the netlist in Openmoko's PCB design is
		flat in these spots, no explicit starpoints.)

Please see the Notes file for PCB layout instructions.
