# HG changeset patch
# User Space Falcon <falcon@ivan.Harhan.ORG>
# Date 1441682006 0
# Node ID ecf935c93cd87f4af8b970973a89f21d6a02362d
# Parent  64d8c59624b4e997811e83a89fb29deda60e6b2a
FFS configuration works

diff -r 64d8c59624b4 -r ecf935c93cd8 chipsetsw/drivers/drv_app/ffs/board/cfgffs.c
--- a/chipsetsw/drivers/drv_app/ffs/board/cfgffs.c	Tue Sep 08 02:01:25 2015 +0000
+++ b/chipsetsw/drivers/drv_app/ffs/board/cfgffs.c	Tue Sep 08 03:13:26 2015 +0000
@@ -56,12 +56,18 @@
 
 #else
 
-uint16 ffs_flash_manufact = 0x00; // autodetect device
+/*
+ * FreeCalypso: TI's cheesy flash type autodetect code does not work
+ * with S71PL129NC0, so we are going to hard-code the device
+ * selection here.
+ */
+
+uint16 ffs_flash_manufact = MANUFACT_AMD;
 //uint16 ffs_flash_manufact = MANUFACT_RAM;
 //uint16 ffs_flash_manufact = 0x04; // Fujitsu
 //uint16 ffs_flash_manufact = 0xBF; // SST
 
-uint16 ffs_flash_device   = 0x0000; // autodetect device
+uint16 ffs_flash_device   = 0x2101;
 //uint16 ffs_flash_device     = 0x0404; // RAM
 //uint16 ffs_flash_device   = 0xB496; // Fujitsu stacked device
 //uint16 ffs_flash_device   = 0x2761; // SST device 1601
diff -r 64d8c59624b4 -r ecf935c93cd8 chipsetsw/drivers/drv_app/ffs/board/dev.c
--- a/chipsetsw/drivers/drv_app/ffs/board/dev.c	Tue Sep 08 02:01:25 2015 +0000
+++ b/chipsetsw/drivers/drv_app/ffs/board/dev.c	Tue Sep 08 03:13:26 2015 +0000
@@ -353,11 +353,16 @@
     /********** AMD Devices ***********************************************/
 
     // Spansion S71PL129NC0 used in Pirelli DP-L10
-    // Multi-id device: 0x227E, 0x2221, 0x2200. Converted to 0x2100
+    // ID made up (same as what Pirelli's fw uses), not using autodetect
     // This is an aftermarket FFS config for the Pirelli target
-    { &flash_32x256[0], (char *) 0x02480000, MANUFACT_AMD,     0x2100,
+    { &flash_32x256[0], (char *) 0x02480000, MANUFACT_AMD,     0x2101,
       FFS_DRIVER_AMD,  6 },
 
+	// AMD Am29DL640F. Ignoring the 8kB sectors
+    // Multi-id device: 0x227E, 0x2221, 0x2200. Converted to 0x2100
+    { &flash_16x64[0], (char *) 0x01800000, MANUFACT_AMD,     0x2100,
+      FFS_DRIVER_AMD,  15 },
+
 	// AMD Am29DL640G. Ignoring the 8kB sectors
     // Multi-id device: 0x227E, 0x2202, 0x2201. Converted to 0x0201
     { &flash_16x64[0], (char *) 0x700000, MANUFACT_AMD,     0x0201,
diff -r 64d8c59624b4 -r ecf935c93cd8 chipsetsw/drivers/drv_app/ffs/board/drv.c
--- a/chipsetsw/drivers/drv_app/ffs/board/drv.c	Tue Sep 08 02:01:25 2015 +0000
+++ b/chipsetsw/drivers/drv_app/ffs/board/drv.c	Tue Sep 08 03:13:26 2015 +0000
@@ -244,7 +244,7 @@
 
 void ffsdrv_amd_write_halfword(volatile uint16 *addr, uint16 value)
 {
-    volatile char *flash = dev.base;
+    volatile uint16 *flash = (volatile uint16 *)dev.base;
     uint32 cpsr;
 
     tlw(led_on(LED_WRITE));
@@ -261,9 +261,9 @@
     cpsr = int_disable();
     tlw(led_toggle(LED_WRITE_SUSPEND));
     dev.state = DEV_WRITE;
-    flash[0xAAAA] = 0xAA; // unlock cycle 1
-    flash[0x5555] = 0x55; // unlock cycle 2
-    flash[0xAAAA] = 0xA0;
+    flash[0x555] = 0xAA; // unlock cycle 1
+    flash[0x2AA] = 0x55; // unlock cycle 2
+    flash[0x555] = 0xA0;
     *addr         = value;
     int_enable(cpsr);
     tlw(led_toggle(LED_WRITE_SUSPEND));
@@ -306,7 +306,7 @@
 
 void ffsdrv_amd_erase(uint8 block)
 {
-    volatile char *flash = dev.base;
+    volatile uint16 *flash = (volatile uint16 *)dev.base;
     uint32 cpsr;
 
     tlw(led_on(LED_ERASE));
@@ -316,11 +316,11 @@
 
     cpsr = int_disable();
     dev.state = DEV_ERASE;
-    flash[0xAAAA] = 0xAA; // unlock cycle 1
-    flash[0x5555] = 0x55; // unlock cycle 2
-    flash[0xAAAA] = 0x80; 
-    flash[0xAAAA] = 0xAA; // unlock cycle 1
-    flash[0x5555] = 0x55; // unlock cycle 2
+    flash[0x555] = 0xAA; // unlock cycle 1
+    flash[0x2AA] = 0x55; // unlock cycle 2
+    flash[0x555] = 0x80; 
+    flash[0x555] = 0xAA; // unlock cycle 1
+    flash[0x2AA] = 0x55; // unlock cycle 2
     *dev.addr = 0x30; // AMD erase sector command
     int_enable(cpsr);