# HG changeset patch
# User Space Falcon <falcon@ivan.Harhan.ORG>
# Date 1441528716 0
# Node ID be8bbcbf2163d72c21445611e83aac577967d853
# Parent  c6c83ac3c1fb76a1e63284dc937b7fc4a4318746
pdt_2092: unsuccessful attempts to make LCD output fit into RVT

diff -r c6c83ac3c1fb -r be8bbcbf2163 chipsetsw/riviera/rvt/rvt_pool_size.h
--- a/chipsetsw/riviera/rvt/rvt_pool_size.h	Sun Sep 06 07:02:09 2015 +0000
+++ b/chipsetsw/riviera/rvt/rvt_pool_size.h	Sun Sep 06 08:38:36 2015 +0000
@@ -37,6 +37,8 @@
 
 #if (TEST==1)
   #define TRACE_MB1_SIZE (750000) /*(25000)*/
+#elif defined(RVM_R2D_SWE)	/* FreeCalypso external LCD output */
+  #define TRACE_MB1_SIZE (150000)
 #elif (!GSMLITE)
   #define TRACE_MB1_SIZE (25000)
 #else
diff -r c6c83ac3c1fb -r be8bbcbf2163 g23m/pdt_2092.mak
--- a/g23m/pdt_2092.mak	Sun Sep 06 07:02:09 2015 +0000
+++ b/g23m/pdt_2092.mak	Sun Sep 06 08:38:36 2015 +0000
@@ -1137,7 +1137,7 @@
                    TEST                   0 \
                    TI_NUC_MONITOR         0 \
                    TI_PROFILER            0 \
-                   TR_BAUD_CONFIG         TR_BAUD_115200 \
+                   TR_BAUD_CONFIG         TR_BAUD_406250 \
                    TRACE_LEVEL_FILTER     5 \
                    USE_GZIP               0 \
                    WCP_PROF               0 \
@@ -3280,7 +3280,7 @@
         DIO_DIOIL_CONFIG=0 \
         L1SW_RAZ_VULSWITCH_REGAUDIO=0 \
         SWCONFIG_RVDATA_INTERNALRAM=0 \
-        SWCONFIG_TR_BAUD_CONFIG=TR_BAUD_115200 \
+        SWCONFIG_TR_BAUD_CONFIG=TR_BAUD_406250 \
         SYS_STD=6 \
         SWCONFIG_LONG_JUMP=3 \
         SWCONFIG_OP_WCP=0 \