# HG changeset patch
# User Mychaela Falconia <falcon@freecalypso.org>
# Date 1558922486 0
# Node ID cb33d81f1386c6c9645fa4c2a9f70fc74a987835
# Parent  7a6eba04c1bbda68e9d74a4881b0cbb5860be47d
pirexplore SPCA552E init delays changed from bogo-ms to true ms

diff -r 7a6eba04c1bb -r cb33d81f1386 target-utils/pirexplore/lcd.c
--- a/target-utils/pirexplore/lcd.c	Mon May 27 01:12:43 2019 +0000
+++ b/target-utils/pirexplore/lcd.c	Mon May 27 02:01:26 2019 +0000
@@ -9,6 +9,8 @@
 #define	nCS4_ADDR0	(*(volatile u16 *)0x02800000)
 #define	nCS4_ADDR2	(*(volatile u16 *)0x02800002)
 
+#define	DELAY_1MS	13000
+
 fb_spca_write(addr, data)
 {
 	GPIO_OUT_REG &= 0xFF7F;
@@ -45,17 +47,24 @@
 	 */
 	GPIO_OUT_REG = 0x0000;
 	GPIO_OUT_REG = 0x0012;
-	/* non-understandable voodoo copied from OsmocomBB */
+	/*
+	 * The non-understandable voodoo that follows has been copied from
+	 * OsmocomBB, and more recently has been updated to use true ms
+	 * delays instead of bogo-ms.  OBB's original code used their
+	 * delay_ms() function, but the latter implements a delay in
+	 * bogo-milliseconds instead of true ms, with 1 bogo-ms equal to
+	 * 400 us in actual physical time.
+	 */
 	fb_spca_write(0x7e, 0x00);	/* internal register access */
-	osmo_delay_ms(10);
+	wait_ARM_cycles(DELAY_1MS * 4);	/* 10 bogo-ms = 4 ms */
 	fb_spca_write(0x7a, 0x00);	/* keep CPU in reset state */
-	osmo_delay_ms(10);
+	wait_ARM_cycles(DELAY_1MS * 4);	/* 10 bogo-ms = 4 ms */
 	fb_spca_write(0x7f, 0x00);	/* select main page */
-	osmo_delay_ms(5);
+	wait_ARM_cycles(DELAY_1MS * 2);	/* 5 bogo-ms = 2 ms */
 	fb_spca_write(0x72, 0x07);	/* don't reshape timing, 16 bit mode */
 	fb_spca_write(0x14, 0x03);
 	fb_spca_write(0x7f, 0x00);	/* select main page */
-	osmo_delay_ms(5);
+	wait_ARM_cycles(DELAY_1MS * 2);	/* 5 bogo-ms = 2 ms */
 	fb_spca_write(0x06, 0xff);
 	fb_spca_write(0x7f, 0x09);
 	fb_spca_write(0x19, 0x08);	/* backlight: 0x08 is on, 0x0c is off */