FreeCalypso > hg > freecalypso-tools
view target-utils/simagent/simup.c @ 1014:961efadd530a default tip
fc-shell TCH DL handler: add support for CSD modes
TCH DL capture mechanism in FC Tourmaline firmware has been extended
to support CSD modes in addition to speech - add the necessary support
on the host tools side.
It needs to be noted that this mechanism in its present state does NOT
provide the debug utility value that was sought: as we learned only
after the code was implemented, TI's DSP has a misfeature in that the
buffer we are reading (a_dd_0[]) is zeroed out when the IDS block
is enabled, i.e., we are reading all zeros and not the real DL bits
we were after. But since the code has already been written, we are
keeping it - perhaps we can do some tests with IDS disabled.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Tue, 26 Nov 2024 06:27:43 +0000 |
| parents | badc5399d641 |
| children |
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#include <sys/types.h> #include <strings.h> #include "types.h" #include "abbdefs.h" #include "simregs.h" #include "timeout.h" #define MAX_ATR_BYTES 33 #define WAIT_ONE_TDMA 60000 extern u16 abb_reg_read(); extern void abb_reg_write(); extern const u8 inverse_coding_table[256]; int sim_if_state; u16 conf1_reg; u8 atr_buf[MAX_ATR_BYTES]; unsigned atr_length; int inverse_coding; void print_atr() { unsigned n; printf("ATR:"); for (n = 0; n < atr_length; n++) printf(" %02X", atr_buf[n]); putchar('\n'); } static rx_atr_byte() { int rc; rc = rx_sim_byte(SIM_WAIT_TIMEOUT); if (rc < 0) { printf("ERROR: timeout waiting for subsequent byte of ATR\n"); return(-1); } rc &= 0xFF; if (inverse_coding) rc = inverse_coding_table[rc]; atr_buf[atr_length++] = rc; return rc; } void cmd_sim_up(argbulk) char *argbulk; { char *argv[2]; u16 abb_sim_reg; unsigned count, y, nhist, have_tck; int rc; if (sim_if_state) { printf("ERROR: SIM interface is already up\n"); return; } if (parse_args(argbulk, 1, 1, argv, 0) < 0) return; if (!strcmp(argv[0], "1.8")) abb_sim_reg = 2; else if (!strcmp(argv[0], "3")) abb_sim_reg = 3; else { printf("ERROR: \"1.8\" or \"3\" argument expected\n"); return; } abb_reg_write(VRPCSIM, abb_sim_reg); sim_if_state = 1; /* wait for regulator like TI's SIM_StartVolt() */ for (count = 0; ; ) { abb_sim_reg = abb_reg_read(VRPCSIM); if (abb_sim_reg & 4) break; if (++count >= 5) { printf("ERROR: VRSIM is not in proper regulation\n"); return; } wait_ARM_cycles(WAIT_ONE_TDMA); } /* TI's SIM_ManualStart() code follows */ SIMREGS.conf1 = conf1_reg = 0x8004; SIMREGS.cmd = SIM_CMD_CLKEN; SIMREGS.cmd = SIM_CMD_CLKEN | SIM_CMD_STOP; wait_ARM_cycles(WAIT_ONE_TDMA * 4); SIMREGS.cmd = SIM_CMD_CLKEN | SIM_CMD_SWRST; wait_ARM_cycles(WAIT_ONE_TDMA); SIMREGS.conf2 = 0x0940; //enter in manual mode to start the ATR sequence SIMREGS.conf1 = conf1_reg |= SIM_CONF1_BYPASS; wait_ARM_cycles(WAIT_ONE_TDMA); SIMREGS.conf1 = conf1_reg |= SIM_CONF1_SVCCLEV; wait_ARM_cycles(WAIT_ONE_TDMA); abb_sim_reg |= 8; abb_reg_write(VRPCSIM, abb_sim_reg); wait_ARM_cycles(WAIT_ONE_TDMA); SIMREGS.conf1 = conf1_reg &= ~SIM_CONF1_SIOLOW; wait_ARM_cycles(WAIT_ONE_TDMA); SIMREGS.conf1 = conf1_reg |= SIM_CONF1_SCLKEN; SIMREGS.conf1 = conf1_reg &= ~SIM_CONF1_TXRX; //set to receive mode wait_ARM_cycles(WAIT_ONE_TDMA * 3); /* flush any garbage in the Rx FIFO */ rc = flush_rx_fifo(); if (rc < 0) return; /* lift the card out of reset! */ SIMREGS.conf1 = conf1_reg |= SIM_CONF1_SRSTLEV; /* first byte of ATR */ rc = rx_sim_byte(SIM_WAIT_TIMEOUT); if (rc < 0) { printf("ERROR: timeout waiting for first byte of ATR\n"); return; } rc &= 0xFF; if (rc == 0x3B) { /* direct convention */ inverse_coding = 0; atr_buf[0] = 0x3B; } else if (rc == 0x03) { /* inverse convention */ inverse_coding = 1; atr_buf[0] = 0x3F; } else { printf( "ERROR: received TS=0x%02X, matches neither convention\n", rc); return; } atr_length = 1; /* remainder of ATR, starting with T0 */ rc = rx_atr_byte(); if (rc < 0) return; nhist = rc & 0xF; y = rc & 0xF0; have_tck = 0; while (y) { if (y & 0x10) { if (atr_length >= MAX_ATR_BYTES) { atr_too_long: printf("ERROR: ATR exceeds 33 byte limit\n"); return; } rc = rx_atr_byte(); if (rc < 0) return; } if (y & 0x20) { if (atr_length >= MAX_ATR_BYTES) goto atr_too_long; rc = rx_atr_byte(); if (rc < 0) return; } if (y & 0x40) { if (atr_length >= MAX_ATR_BYTES) goto atr_too_long; rc = rx_atr_byte(); if (rc < 0) return; } if (y & 0x80) { if (atr_length >= MAX_ATR_BYTES) goto atr_too_long; rc = rx_atr_byte(); if (rc < 0) return; y = rc & 0xF0; if (rc & 0x0F) have_tck = 1; } else y = 0; } for (count = 0; count < nhist + have_tck; count++) { if (atr_length >= MAX_ATR_BYTES) goto atr_too_long; rc = rx_atr_byte(); if (rc < 0) return; } /* all good! */ sim_if_state = 2; if (inverse_coding) conf1_reg |= SIM_CONF1_CONV | SIM_CONF1_CHKPAR; else conf1_reg |= SIM_CONF1_CHKPAR; SIMREGS.conf1 = conf1_reg; print_atr(); }
