# This config is meant to be applicable to most "generic" or "vanilla"
# Calypso devices with just the following properties expected:
#
# * Calypso chip is C035, meaning it's ok to run the PLL at 104 MHz
#   and give 52 MHz to the ARM7;
# * There is one flash bank on nCS0 and one XRAM bank on nCS1;
# * 8 MiB flash chip may be present, thus ADD22 needs to be enabled.

# The following parameters go into the <p command sent to the boot ROM
pll-config 4/1		# 26 MHz in, PLL&DSP @ 104 MHz, ARM @ 52 MHz
rhea-cntl 0x00		# good for all Calypso platforms

# The remaining settings are carried out via loadagent commands
init-script basic-4ws-8mb.init

# Flash configuration
flash single-8M 0x03000000

# Perform a Iota poweroff when we are done
exit-mode iota-off