FreeCalypso > hg > freecalypso-tools
comparison doc/Loadtool-targets @ 568:a97d96e0fc5c
doc: new Loadtool-targets article
| author | Mychaela Falconia <falcon@freecalypso.org> |
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| date | Sat, 01 Feb 2020 22:17:04 +0000 |
| parents | |
| children | 7b4c011fa798 |
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| 567:8f84b26bd111 | 568:a97d96e0fc5c |
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| 1 Explanation of -h targets for fc-loadtool and friends | |
| 2 ===================================================== | |
| 3 | |
| 4 It is possible to run fc-loadtool without giving it any -h option at all - if | |
| 5 run in this manner, the tool will still gain access to the target Calypso device | |
| 6 via its boot ROM and allow some peeking and poking to be done, but it will run | |
| 7 with some major limitations: | |
| 8 | |
| 9 * No PLL multiplier will be set up, thus the Calypso ARM7 core will run at | |
| 10 13 MHz rather than the preferred faster frequency of 39 MHz for Calypso C05 | |
| 11 or 52 MHz for Calypso C035. | |
| 12 | |
| 13 * In the absence of a hardware parameter file specifying flash configuration, | |
| 14 all high-level flash operations (all commands beginning with flash) will be | |
| 15 disabled. One can still dump the flash manually using the low-level dump2bin | |
| 16 command (as opposed to flash dump2bin), but no other flash manipulations are | |
| 17 possible. | |
| 18 | |
| 19 * With most -h hardware parameter files the default exit mode is set to | |
| 20 exit iota-off, but without a hardware parameter file it will be exit bare | |
| 21 by default. | |
| 22 | |
| 23 fc-xram is not useful at all without -h: one cannot load anything into XRAM | |
| 24 until Calypso MEMIF is set up properly for XRAM access, and this setup is done | |
| 25 by the init scripts referenced from hardware parameter files. | |
| 26 | |
| 27 Available -h targets | |
| 28 ==================== | |
| 29 | |
| 30 -h compal and -h c155 | |
| 31 | |
| 32 -h compal needs to be used for all of "lower" Compal subfamilies | |
| 33 (everything other than Mot C155/156); -h c155 is self-explanatory. | |
| 34 Very special loadtools configuration is needed for Compal targets, | |
| 35 telling our tools to use a very different way of gaining entry through | |
| 36 Compal's bootloader and configuring the special flash erase-program-boot | |
| 37 hack. | |
| 38 | |
| 39 All following configurations are for more sane, meaning non-Compal targets: | |
| 40 | |
| 41 -h c05 and -h c035 | |
| 42 | |
| 43 These are the most generic configurations we have, indicating only the | |
| 44 use of Calypso C05 or C035, respectively, but no other knowledge about | |
| 45 target hardware. These minimal configs are not usable for flash | |
| 46 manipulation or for fc-xram, but they may be useful for fc-iram or | |
| 47 low-level (non-flash) fc-loadtool operations. | |
| 48 | |
| 49 -h c05i and -h c035i | |
| 50 | |
| 51 These two configurations are the next step up in target-specific | |
| 52 knowledge from the more basic c05 and c035: the present c05i and c035i | |
| 53 configs additionally indicate the use of a Iota ABB, telling our tools | |
| 54 to perform a Iota poweroff when we are done. They are still not usable | |
| 55 for flash manipulation or for fc-xram, but they are ideal for the | |
| 56 simpler and more specialized fc-buzplay and fc-dspromdump tools. | |
| 57 | |
| 58 -h gen4 and -h gen8 | |
| 59 | |
| 60 These two configs are our most generic fc-loadtool targets: they are | |
| 61 supersets of c035i (Calypso C035 and Iota ABB required), supporting | |
| 62 4 MiB or 8 MiB flash on Calypso nCS0, respectively. More precisely, | |
| 63 our gen4 config supports *up to* 4 MiB of flash, whereas gen8 supports | |
| 64 up to 8 MiB. In the vast majority of cases it is safe and thus easier | |
| 65 to use gen8; the more conservative gen4 config is only needed when you | |
| 66 DON'T want Calypso multifunction pin CS4/ADD22 to be switched from CS4 | |
| 67 to ADD22, either because you know for certain that the flash chip is | |
| 68 4 MiB or less or because you found a super-exotic board on which this | |
| 69 pin is actually used as CS4 - we have never seen one of the latter. | |
| 70 | |
| 71 These gen4 and gen8 configs set up Calypso MEMIF registers for nCS0 and | |
| 72 nCS1; the latter is assumed to be connected to XRAM and is set up for | |
| 73 fc-xram. MEMIF configuration registers are set up with WS=4 - please | |
| 74 refer to the MEMIF-wait-states article in the freecalypso-docs | |
| 75 repository. | |
| 76 | |
| 77 -h dsample | |
| 78 | |
| 79 The dsample target is special in two ways: | |
| 80 | |
| 81 * The PLL multiplier is set to 3 rather than 4, resulting in 39 MHz | |
| 82 ARM7 core clock instead of 52 MHz - this slowdown is needed because | |
| 83 early D-Sample boards have Calypso C05 chips on them. | |
| 84 | |
| 85 * Calypso MEMIF setup is done for nCS0 (flash), nCS1 (main XRAM) and | |
| 86 nCS2 (extra XRAM), making all of D-Sample XRAM available to fc-xram. | |
| 87 | |
| 88 For flash manipulation purposes this dsample target is no different | |
| 89 from gen8. | |
| 90 | |
| 91 -h fcfam | |
| 92 | |
| 93 The only special features of this configuration are: | |
| 94 | |
| 95 * Calypso MEMIF setup is done for nCS0, nCS1 and nCS2 like on D-Sample; | |
| 96 | |
| 97 * Flash support is configured to look for the second 8 MiB flash bank | |
| 98 on Calypso nCS2. | |
| 99 | |
| 100 This configuration is required for flash manipulation on boards like | |
| 101 our current FCDEV3B that have S71PL129N or S71PL129J flash chips with | |
| 102 the second flash chip select wired to Calypso nCS2. This config can be | |
| 103 considered a special superset of gen8: every target that works with | |
| 104 -h gen8 will also work with -h fcfam, but not the other way around. | |
| 105 | |
| 106 -h fic | |
| 107 | |
| 108 FIC's board wiring that has made its way into Openmoko GTA01 and GTA02 | |
| 109 PCBs and was also undoubtedly used on FIC's earlier pre-Openmoko phones | |
| 110 or modems allows for up to 16 MiB of flash (4 MiB, 8 MiB or 16 MiB | |
| 111 flash chips can be populated on the same PCB footprint) with the second | |
| 112 flash chip select wired to Calypso nCS4. | |
| 113 | |
| 114 This -h fic config supports all FIC Calypso devices with 4 MiB, 8 MiB | |
| 115 or 16 MiB flash, and like -h fcfam it can be considered a special | |
| 116 superset of gen4 and gen8, special for FIC's board wiring where the | |
| 117 potential 2nd flash chip select goes to nCS4. | |
| 118 | |
| 119 -h gta02 | |
| 120 | |
| 121 This narrowly specialized config is deprecated and will be removed in a | |
| 122 future release of FC host tools; please use the new generalized -h fic | |
| 123 config instead. | |
| 124 | |
| 125 -h leonardo | |
| 126 | |
| 127 This config is a Calypso C05 counterpart to -h fcfam, i.e., -h leonardo | |
| 128 differs from -h fcfam only in that the Calypso boot ROM is told to | |
| 129 program the PLL with a lower multiplier, running the PLL at 78 MHz | |
| 130 instead of 104 MHz, with the ARM7 core getting 39 MHz instead of 52 MHz. | |
| 131 This slowdown is needed because early Leonardo boards had Calypso C05 | |
| 132 chips on them. | |
| 133 | |
| 134 -h pirelli | |
| 135 | |
| 136 The Pirelli DP-L10 phone has had its own dedicated -h pirelli target | |
| 137 config since the beginning of FreeCalypso, and this special config is | |
| 138 still needed because these phones have 16 MiB flash chips (either | |
| 139 S71PL129J or S71PL129N) with the second flash chip select wired to | |
| 140 Calypso nCS3, a wiring arrangement original to this Pirelli DP-L10. | |
| 141 | |
| 142 -h w220 | |
| 143 | |
| 144 Motorola W220 (made by Chi-Mei, *not* a Compal target!) gets its own | |
| 145 special loadtools config because of its XRAM wiring: the XRAM bank sits | |
| 146 on Calypso nCS3 instead of the usual nCS1. |
