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comparison target-utils/include/timer.h @ 77:0f11da299b7d

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buzplayer: beginning of timer implementation
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 27 Oct 2016 04:01:16 +0000
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76:5bbba2cab6f3 77:0f11da299b7d
1 /*
2 * Definitions for Calypso general-purpose timer registers
3 *
4 * This header is usable from both .c and .S source files.
5 */
6
7 #ifndef _CALYPSO_TIMER_H
8 #define _CALYPSO_TIMER_H
9
10 #define TIMER1_BASE_ADDR 0xFFFE3800
11 #define TIMER2_BASE_ADDR 0xFFFE6800
12
13 #ifdef __ASSEMBLER__
14
15 /*
16 * Assembly source with cpp
17 *
18 * The most convenient way to access registers like these from ARM
19 * assembly is to load the base address of the register block in some
20 * ARM register, using only one ldr rN, =xxx instruction and only one
21 * literal pool entry, and then access various registers in the block
22 * from the same base using the immediate offset addressing mode.
23 *
24 * Here we define the offsets for the usage scenario above.
25 */
26
27 #define CNTL_TIM 0x00
28 #define LOAD_TIM 0x02
29 #define READ_TIM 0x04
30
31 #else
32
33 /*
34 * C source
35 *
36 * For access from C, we define the layout of each timer register block
37 * as a struct, and then define a pleudo-global-var for easy "volatile"
38 * access to each of the 2 timers.
39 */
40
41 struct timer_regs {
42 unsigned char cntl;
43 unsigned char pad;
44 unsigned short load;
45 unsigned short read;
46 };
47
48 #define TIMER1_REGS (*(volatile struct timer_regs *) TIMER1_BASE_ADDR)
49 #define TIMER2_REGS (*(volatile struct timer_regs *) TIMER2_BASE_ADDR)
50
51 #endif
52
53 /* CNTL register bit definitions */
54 #define CNTL_START 0x01
55 #define CNTL_AUTO_RELOAD 0x02
56 #define CNTL_CLOCK_ENABLE 0x20
57
58 #endif /* include guard */