FreeCalypso > hg > freecalypso-tools
annotate doc/Target-utils @ 521:6604403aa212
doc/Target-utils: checking in unfinished document
| author | Mychaela Falconia <falcon@freecalypso.org> | 
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| date | Thu, 06 Jun 2019 06:38:46 +0000 | 
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| children | aa4f70e36cbd | 
| rev | line source | 
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| 521 
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doc/Target-utils: checking in unfinished document
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changeset | 1 FreeCalypso target-utils suite | 
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changeset | 2 ============================== | 
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changeset | 3 | 
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changeset | 4 We have a suite of standalone programs and specialized code pieces that run on | 
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changeset | 5 the Calypso ARM7 processor, but are not regular operational phone or modem | 
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changeset | 6 firmware; this suite of code bits is called target-utils, maintained and | 
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changeset | 7 distributed together with FreeCalypso host tools. The primary reason for the | 
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changeset | 8 coupling between FC host tools and target-utils is that the target-utils suite | 
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 Mychaela Falconia <falcon@freecalypso.org> parents: diff
changeset | 9 provides the loadagent target program for fc-loadtool and fc-xram host tools, | 
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changeset | 10 as well as compalstage code pieces needed for operating on Compal phones. | 
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changeset | 11 | 
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changeset | 12 Most programs in the target-utils suite are meant to execute out of RAM | 
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changeset | 13 (specifically, the Calypso chip's internal RAM or IRAM for short), loaded and | 
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changeset | 14 run via fc-iram or fc-compalram - they are not meant to be flashed. As of this | 
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changeset | 15 writing, the following run-from-RAM programs are available: | 
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changeset | 16 | 
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changeset | 17 buzplayer Player for buzzer melodies, used by fc-buzplay | 
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changeset | 18 c139explore Mot C139 hardware exploration program | 
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changeset | 19 calversion Calypso version ID tool, primarily for the DSP ROM version | 
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changeset | 20 helloapp Hello-world program | 
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changeset | 21 loadagent Flash manipulation and XRAM loading agent | 
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changeset | 22 pirexplore Pirelli DP-L10 hardware exploration program | 
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changeset | 23 simtest Low-level exerciser for the SIM interface hardware | 
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changeset | 24 | 
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changeset | 25 Aside from c139explore which is built as a binary to be loaded via fc-compalram | 
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changeset | 26 (Compal's bootloader protocol), all of the above programs are built as S-record | 
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changeset | 27 images to be loaded via fc-iram. Once loaded via the respective serial code | 
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changeset | 28 download protocol, each of the listed programs runs interactively, listening | 
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changeset | 29 for and executing commands given over the serial port. The specific set of | 
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changeset | 30 available commands is different for each program as relevant to its function, | 
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changeset | 31 but the command framework is common across the target-utils suite. The command | 
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changeset | 32 interface is text-based, such that each program can be driven manually by a | 
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changeset | 33 human operator once fc-iram or fc-compalram has dropped into the tty pass-thru | 
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changeset | 34 mode, but this same text-based command interface can also be driven by other | 
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changeset | 35 programs: fc-loadtool and fc-xram drive loadagent, and fc-buzplay drives | 
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changeset | 36 buzplayer. | 
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changeset | 37 | 
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changeset | 38 Code architecture and execution environment | 
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changeset | 39 =========================================== | 
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changeset | 40 | 
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changeset | 41 Our target-utils suite is built with the GNU toolchain (gcc+binutils), not TI's | 
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changeset | 42 proprietary TMS470 compiler. Because all of target-utils are meant to run out | 
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changeset | 43 of IRAM rather than flash or XRAM, we compile all code in ARM mode (not Thumb), | 
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changeset | 44 and we build without interworking support (no -mthumb-interwork): the ARMv4T | 
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changeset | 45 architecture implemented by the ARM7TDMI core in the Calypso does not support | 
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changeset | 46 penalty-free ARM/Thumb interworking, thus ARM-only code without interworking | 
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changeset | 47 support is the most efficient option for execution out of IRAM. | 
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changeset | 48 | 
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changeset | 49 Selection of UART for communication | 
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changeset | 50 =================================== | 
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changeset | 51 | 
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changeset | 52 All target-utils programs are interactive, listening for text commands given | 
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changeset | 53 over a serial port. But which UART? The Calypso chip has two UARTs, called | 
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changeset | 54 MODEM and IrDA in the chip docs - which of the two should be used for host | 
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changeset | 55 communication? The answer is a trick original to FreeCalypso: most of our | 
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changeset | 56 target-utils programs that are meant to be loaded via fc-iram expect to be | 
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changeset | 57 loaded specifically via the Calypso boot ROM and not in some other way, and | 
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changeset | 58 they look at some of the IRAM variables left behind by the boot ROM code. The | 
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changeset | 59 boot ROM listens on both UARTs for an interrupt-boot sequence, and once it | 
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changeset | 60 receives that sequence on one of the UARTs, it remembers which UART it was and | 
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changeset | 61 uses that same UART for the rest of the serial code download protocol. We read | 
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changeset | 62 that same variable set by the boot ROM, which depends on the boot ROM version. | 
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changeset | 63 To handle different Calypso boot ROM versions, we read the 16-bit word at 0x1FFE | 
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changeset | 64 (the last 16 bits of the boot ROM image) where TI put the boot ROM version | 
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changeset | 65 number, and we support boot ROM versions 0200 (Calypso C05 rev B silicon) and | 
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changeset | 66 0300 (Calypso C035 silicon). Most target-utils programs won't work (will fail | 
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changeset | 67 to select the UART for communication) if the boot ROM is some unsupported | 
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changeset | 68 version or missing altogether, or if the boot ROM is there, but didn't do the | 
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changeset | 69 loading. | 
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changeset | 70 | 
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changeset | 71 The exceptions are as follows: | 
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changeset | 72 | 
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changeset | 73 * c139explore always uses the MODEM UART as appropriate for Mot C139; | 
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changeset | 74 | 
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changeset | 75 * flash-boot-test (a flashable program described later in this article) always | 
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changeset | 76 uses the IrDA UART; | 
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changeset | 77 | 
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changeset | 78 * helloapp is built in 3 versions: helloapp-bootrom.srec, helloapp-irda.srec | 
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changeset | 79 and helloapp-modem.srec. The first version depends on the boot ROM like | 
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changeset | 80 other programs, the other two versions are built as fixed-IrDA or fixed-MODEM. | 
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changeset | 81 | 
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changeset | 82 Other boot ROM and fc-iram dependencies | 
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changeset | 83 ======================================= | 
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changeset | 84 | 
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changeset | 85 There are two other ways in which target-utils programs that are meant to be | 
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changeset | 86 loaded via fc-iram depend on the Calypso boot ROM: | 
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changeset | 87 | 
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changeset | 88 1) The Calypso gets its clock input from the RF section of the GSM device, and | 
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changeset | 89 the RF block can feed either 13 MHz or 26 MHz to the Calypso - some GSM RF | 
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changeset | 90 transceiver chips require 13 MHz (TI Clara), others require 26 MHz (TI Rita | 
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changeset | 91 and Silabs Aero II), yet others can work with either clock (Silabs Aero+), | 
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changeset | 92 and some use a 26 MHz crystal but have the option of feeding either 13 or | 
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changeset | 93 26 MHz to the Calypso (Aero II). The Calypso initially boots without knowing | 
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changeset | 94 what clock frequency it is running at, but then it needs to be told via a | 
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changeset | 95 register setting what the input clock frequency is, so that all peripherals | 
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changeset | 96 (both GSM-specific and general-purpose) always run at 13 MHz. | 
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changeset | 97 | 
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changeset | 98 When the Calypso boot process is interrupted and diverted to serial code | 
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changeset | 99 download in the boot ROM, the boot ROM code autodetects whether the CLKTCXO | 
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changeset | 100 input runs at 13 MHz or 26 MHz (it tries both register bits settings until | 
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changeset | 101 the serial '<' characters sent by the host at 19200 baud are received | 
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changeset | 102 correctly), and if the CLKTCXO input is 26 MHz, the VCLKOUT_DIV2 bit is set | 
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changeset | 103 in the FFFF:FD02 register. Most of our target-utils programs have no hard- | 
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changeset | 104 coded knowledge of the 13 MHz vs. 26 MHz board hardware configuration and | 
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changeset | 105 rely on the Calypso boot ROM to set the division control bits in the | 
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changeset | 106 FFFF:FD02 register correctly for the autodetected clock. | 
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changeset | 107 | 
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changeset | 108 2) The boot ROM allows the serial download host (fc-iram in our case) to | 
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changeset | 109 configure the Calypso DPLL, allowing the ARM7 core to run at its maximum | 
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changeset | 110 frequency of 52 MHz on Calypso C035 or 39 MHz on the older Calypso C05 | 
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changeset | 111 silicon. None of our target-utils programs do their own DPLL setup, instead | 
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changeset | 112 they run with whatever they were booted with - therefore, in order for the | 
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changeset | 113 IRAM programs to run at their intended fastest speed, the correct -h option | 
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changeset | 114 needs to be given to fc-iram, selecting a hardware parameter file with the | 
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changeset | 115 right pll-config setting. | 
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changeset | 116 | 
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changeset | 117 Delay loop timing | 
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changeset | 118 ================= | 
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changeset | 119 | 
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changeset | 120 There are a few places in target-utils where a delay of some specific duration | 
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changeset | 121 needs to be inserted. In most cases the requirement is for a certain minimum | 
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changeset | 122 delay, with more delay time being harmless except for inefficiency, but there | 
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changeset | 123 is one case (SPCA552E chip initialization in pirexplore) where the delay | 
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changeset | 124 requirement is strict: if the delays are too short or too long, the LCD doesn't | 
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changeset | 125 work. In target-utils all of these delays are implemented with CPU-cycle-count | 
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changeset | 126 delay loops that are calibrated at software design time; if the code runs out | 
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changeset | 127 of IRAM and the ARM7 core runs at 52 MHz, the delays will be exactly as | 
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changeset | 128 designed, otherwise they will be longer. In the case of pirexplore the strict | 
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changeset | 129 timing requirement is satisfied by loading and running the program via fc-iram | 
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changeset | 130 -h pirelli, resulting in the correct 52 MHz clock configuration; in all other | 
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changeset | 131 cases running at a frequency below 52 MHz or running out of flash (the | 
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changeset | 132 flash-boot-test special case) produces longer-than-needed delays. | 
