FreeCalypso > hg > freecalypso-tools

annotate loadtools/flashops.c @ 407:19e5a3e2f9c0

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fcup-settime: moved time() retrieval a little closer to the output A fundamental problem with all simple time transfer tools is that there is always some delay between the time retrieval on the source system and that transmitted time being set on the destination, and the resulting time on the destination system is off by that delay amount. This delay cannot be fully eliminated when working in a simple environment like ours, but we should make our best effort to minimize it. In the present case, moving the atinterf_init() call before the time() retrieval should make a teensy-tiny improvement.
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 11 Aug 2018 21:52:17 +0000
parents 545e1718f5fb
children 0dd2c87c1b63
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0
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1 /*
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2 * This module implements those flash operations which are dependent
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3 * on the AMD vs. Intel command set style.
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4 */
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5
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6 #include <sys/types.h>
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7 #include <stdio.h>
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8 #include <stdint.h>
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9 #include <stdlib.h>
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10 #include <time.h>
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11 #include "flash.h"
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12
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13 /* common stub functions */
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14
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15 static
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16 noop()
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17 {
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18 return(0);
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19 }
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20
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21 static
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22 invalid()
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23 {
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24 fprintf(stderr,
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Mychaela Falconia <falcon@freecalypso.org>
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25 "This operation is not applicable to the selected flash type\n");
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26 return(-1);
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27 }
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28
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29 /* AMD flash functions */
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30
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31 amd_reset_cmd(bi)
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32 struct flash_bank_info *bi;
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33 {
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34 if (do_w16(bi->base_addr + 0xAAA, 0xF0)) {
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35 fprintf(stderr,
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Mychaela Falconia <falcon@freecalypso.org>
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36 "unexpected response to w16 when resetting flash to read mode!\n");
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Mychaela Falconia <falcon@freecalypso.org>
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37 return(-1);
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38 }
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39 return(0);
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40 }
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41
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42 amd_sector_erase(bi, sp)
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43 struct flash_bank_info *bi;
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44 struct sector_info *sp;
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45 {
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46 int stat;
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47 uint16_t flstat;
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48 time_t start_time, curtime;
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49
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50 stat = do_w16(bi->base_addr + sp->start + 0xAAA, 0xAA);
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51 if (stat) {
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52 bad_w16: fprintf(stderr,
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53 "unexpected response to w16 in erase cmd sequence - aborting\n");
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54 return(-1);
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55 }
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56 stat = do_w16(bi->base_addr + sp->start + 0x554, 0x55);
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57 if (stat)
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58 goto bad_w16;
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59 stat = do_w16(bi->base_addr + sp->start + 0xAAA, 0x80);
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60 if (stat)
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61 goto bad_w16;
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62 stat = do_w16(bi->base_addr + sp->start + 0xAAA, 0xAA);
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63 if (stat)
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64 goto bad_w16;
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65 stat = do_w16(bi->base_addr + sp->start + 0x554, 0x55);
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66 if (stat)
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67 goto bad_w16;
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68 stat = do_w16(bi->base_addr + sp->start + 0xAAA, 0x30);
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69 if (stat)
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70 goto bad_w16;
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71 start_time = time(0);
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72 for (;;) {
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73 stat = do_r16(bi->base_addr + sp->start, &flstat);
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74 if (stat)
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75 return(stat); /* error msg already printed */
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76 if (flstat == 0xFFFF)
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77 return(0);
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78 curtime = time(0);
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79 if (curtime >= start_time + 20) {
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80 fprintf(stderr, "erase timeout, aborting\n");
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81 return(-1);
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82 }
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83 }
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84 }
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85
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86 struct flash_cmdset flash_cmdset_amd = {
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87 .cmdset_name = "AMD",
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88 .reset_cmd = amd_reset_cmd,
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89 .status_cmd = invalid,
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90 .unlock_sector = invalid,
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91 .erase_sector = amd_sector_erase,
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92 .prep_for_program = noop,
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93 .loadagent_setbase_cmd = "AMFB",
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94 .loadagent_program_cmd = "AMFW",
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95 .needs_unlock = 0,
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96 };
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97
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98 /* Intel flash functions */
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99
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100 intel_reset_cmd(bi)
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101 struct flash_bank_info *bi;
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102 {
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103 if (do_w16(bi->base_addr, 0xFF)) {
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104 fprintf(stderr,
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105 "unexpected response to w16 when resetting flash to read mode!\n");
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Mychaela Falconia <falcon@freecalypso.org>
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106 return(-1);
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Mychaela Falconia <falcon@freecalypso.org>
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107 }
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108 return(0);
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Mychaela Falconia <falcon@freecalypso.org>
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109 }
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110
325
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111 intel_w30_reset_cmd(bi)
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112 struct flash_bank_info *bi;
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113 {
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114 uint32_t part;
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115
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116 for (part = 0; part < bi->geom->total_size; part += 0x80000) {
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
117 if (do_w16(bi->base_addr + part, 0xFF)) {
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
118 fprintf(stderr,
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
119 "unexpected response to w16 when resetting flash to read mode!\n");
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
120 return(-1);
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
121 }
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
122 }
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
123 return(0);
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
124 }
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
125
0
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126 intel_status_cmd(bi)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127 struct flash_bank_info *bi;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 int stat;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 uint16_t sr;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 /* issue Read SR command */
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 stat = do_w16(bi->base_addr, 0x70);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 if (stat) {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 fprintf(stderr,
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 "unexpected response to w16 for Read SR command\n");
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 return(-1);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 stat = do_r16(bi->base_addr, &sr);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 if (stat)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 return(stat); /* error msg already printed */
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 sr &= 0xFF;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 printf("Status Register: %02X\n", sr);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 return(0);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146
325
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
147 intel_w30_status_cmd(bi)
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
148 struct flash_bank_info *bi;
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
149 {
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
150 uint32_t part;
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
151 int stat;
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
152 uint16_t sr;
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
153
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
154 for (part = 0; part < bi->geom->total_size; part += 0x80000) {
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
155 /* issue Read SR command */
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
156 stat = do_w16(bi->base_addr + part, 0x70);
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
157 if (stat) {
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
158 fprintf(stderr,
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
159 "unexpected response to w16 for Read SR command\n");
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
160 return(-1);
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
161 }
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
162 stat = do_r16(bi->base_addr + part, &sr);
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
163 if (stat)
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
164 return(stat); /* error msg already printed */
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
165 sr &= 0xFF;
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
166 printf("Status Register for partition %08lX: %02X\n",
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
167 (u_long) part, sr);
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
168 }
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
169 return(0);
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
170 }
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
171
0
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172 intel_sector_unlock(bi, sp)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 struct flash_bank_info *bi;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 struct sector_info *sp;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 int stat;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 stat = do_w16(bi->base_addr + sp->start, 0x60);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179 if (stat) {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 bad_w16: fprintf(stderr,
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 "unexpected response to w16 in block unlock cmd sequence - aborting\n");
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 return(-1);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 stat = do_w16(bi->base_addr + sp->start, 0xD0);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 if (stat)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 goto bad_w16;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 return(0);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 intel_sector_erase(bi, sp)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 struct flash_bank_info *bi;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 struct sector_info *sp;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 int stat;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 uint16_t flstat;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 time_t start_time, curtime;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 stat = intel_sector_unlock(bi, sp);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 if (stat)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 return(stat); /* error msg already printed */
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 /* clear SR */
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 stat = do_w16(bi->base_addr + sp->start, 0x50);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 if (stat) {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 bad_w16: fprintf(stderr,
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 "unexpected response to w16 in erase cmd sequence - aborting\n");
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 return(-1);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 /* send the actual block erase command */
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 stat = do_w16(bi->base_addr + sp->start, 0x20);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 if (stat)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 goto bad_w16;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212 stat = do_w16(bi->base_addr + sp->start, 0xD0);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 if (stat)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214 goto bad_w16;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 /* wait for completion */
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 start_time = time(0);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 for (;;) {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 stat = do_r16(bi->base_addr + sp->start, &flstat);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 if (stat)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 return(stat); /* error msg already printed */
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 if (flstat & 0x80)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 break;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 curtime = time(0);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 if (curtime >= start_time + 20) {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 fprintf(stderr, "erase timeout, aborting\n");
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 return(-1);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 if (flstat & 0x20) {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 fprintf(stderr, "block erase failed!\n");
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 return(-1);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 } else
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233 return(0);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 intel_clear_sr(bi)
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237 struct flash_bank_info *bi;
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238 {
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239 printf("Clearing Intel flash SR\n");
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240 if (do_w16(bi->base_addr, 0x50)) {
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241 fprintf(stderr,
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242 "unexpected response to w16 for Clear SR command\n");
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243 return(-1);
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244 }
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245 return(0);
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246 }
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247
325
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248 intel_w30_clear_sr(bi)
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249 struct flash_bank_info *bi;
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250 {
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251 uint32_t part;
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252
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253 printf("Clearing Intel flash SR\n");
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254 for (part = 0; part < bi->geom->total_size; part += 0x80000) {
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255 if (do_w16(bi->base_addr + part, 0x50)) {
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256 fprintf(stderr,
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257 "unexpected response to w16 for Clear SR command\n");
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258 return(-1);
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259 }
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260 }
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261 return(0);
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262 }
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263
0
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264 struct flash_cmdset flash_cmdset_intel = {
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265 .cmdset_name = "Intel",
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266 .reset_cmd = intel_reset_cmd,
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267 .status_cmd = intel_status_cmd,
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268 .unlock_sector = intel_sector_unlock,
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269 .erase_sector = intel_sector_erase,
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270 .prep_for_program = intel_clear_sr,
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271 .loadagent_setbase_cmd = "INFB",
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272 .loadagent_program_cmd = "INFW",
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273 .needs_unlock = 1,
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274 };
325
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275
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276 struct flash_cmdset flash_cmdset_intel_w30 = {
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277 .cmdset_name = "Intel",
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278 .reset_cmd = intel_w30_reset_cmd,
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279 .status_cmd = intel_w30_status_cmd,
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280 .unlock_sector = intel_sector_unlock,
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281 .erase_sector = intel_sector_erase,
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282 .prep_for_program = intel_w30_clear_sr,
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283 .loadagent_setbase_cmd = "INFB",
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284 .loadagent_program_cmd = "INFW",
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285 .needs_unlock = 1,
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286 };