annotate target-utils/flash-boot-test/uartinit.S @ 465:003e48f8ebe1

rvinterf/etmsync/fsnew.c: cast 0 to (char *) for execl sentinel I generally don't use NULL and use plain 0 instead, based on a "NULL considered harmful" discussion on the classiccmp mailing list many aeons ago (I couldn't find it, and I reason that it must have been 2005 or earlier), but a recent complaint by a packager sent me searching, and I found this: https://ewontfix.com/11/ While I don't give a @#$% about "modern" systems and code-nazi tools, I realized that passing a plain 0 as a pointer sentinel in execl is wrong because it will break on systems where pointers are longer than the plain int type. Again, I don't give a @#$% about the abomination of x86_64 and the like, but if anyone ever manages to port my code to something like a PDP-11 (16-bit int, 32-bit long and pointers), then passing a plain 0 as a function argument where a pointer is expected most definitely won't work: if the most natural stack slot and SP alignment unit is 16 bits, fitting an int, with longs and pointers taking up two such slots, then the call stack will be totally wrong with a plain 0 passed for a pointer. Casting the 0 to (char *) ought to be the most kosher solution for the most retro systems possible.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 11 Feb 2019 00:00:19 +0000
parents cc6594a7fc7a
children
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1 /*
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2 * The UART initialization code in this assembly module has been lifted
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3 * from the disassembly of the Calypso boot ROM, and slightly adapted
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4 * for our needs.
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5 */
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6
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7 .text
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8 .code 32
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9 .globl uart_init
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10
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11 uart_init:
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12 stmfd sp!, {r4-r11,lr}
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13 @ prepare UART init values
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14 mov r11, #3
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15 mov r5, #0
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16 mov r10, #7 @ baud rate divisor for 115200 baud
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17 mov r9, #0x80
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18 mov r7, #0xbf
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19 mov r4, #7
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20 @ UART base address
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21 ldr r6, =uart_base
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22 ldr r12, [r6]
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23 add r3, r12, #8
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24 @ R3 points to register 8 (MDR1)
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25 @ write 07 into it: reset mode
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26 strb r4, [r3]
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27 add r0, r12, #3
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28 @ R0 points to register 3 (LCR)
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29 @ write BF into it: map in the extended registers
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30 strb r7, [r0]
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31 add r1, r12, #2
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32 @ R1 points to register 2: EFR under current mapping
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33 @ set bit 4: enable enhanced functions
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34 ldrb r8, [r1]
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35 orr r8, r8, #0x10
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36 strb r8, [r1]
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37 @ write 80 into LCR: map in the baud rate divisor registers
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38 strb r9, [r0]
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39 @ reg 2 (pointed to by R1) is now IIR/FCR
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40 @ write 07 into FCR: FIFOs enabled and cleared, no DMA
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41 strb r4, [r1]
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42 @ write BF into LCR again
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43 strb r7, [r0]
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44 @ load baud rate divisor
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45 strb r10, [r12]
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46 strb r5, [r12, #1]
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47 @ write 03 into LCR: restore normal registers, 8N1
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48 strb r11, [r0]
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49 @ write 00 into MDR1: plain UART mode
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50 strb r5, [r3]
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51 ldmfd sp!, {r4-r11,pc}