FreeCalypso > hg > freecalypso-schem2
changeset 33:1d2b57d4f1c9
intnoconn approach to charging current sense resistor
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Mon, 22 Nov 2021 03:03:15 +0000 |
| parents | 85fbd582af88 |
| children | dfa0d08d8f2b |
| files | venus/doc/Charging-circuit venus/src/MCL venus/src/periph/charging_circuit.v venus/src/pinouts/resistor_with_sense.pinout venus/src/primitives venus/src/starpoints |
| diffstat | 6 files changed, 73 insertions(+), 9 deletions(-) [+] |
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/venus/doc/Charging-circuit Mon Nov 22 03:03:15 2021 +0000 @@ -0,0 +1,49 @@ +The battery charging circuit on FC Venus board is the one depicted on page 56 +of this TI document: + +ftp://ftp.freecalypso.org/pub/GSM/Calypso/APN0_120.pdf + +Specifically, it is the circuit depicted on the right side of Figure 7-5, the +circuit with the charging power source at the top and the battery at the bottom. +Going from net VCHG (output of our charging control switch S701) to net VBAT +(battery +ve terminal), the charging circuit consists of Q401, D404 and R407 +strung in series, with R406 adjoining between Q401 and D404. The exact location +of this circuit on the board will be up to the PCB layout engineer, but we +expect that all 4 of the just-named components will be placed on the same side +of the board (either top or bottom), with surface traces (no vias) carrying the +charging current (500 mA design intent) from each component to the next. It is +important to note that whichever side of the board this circuit is placed on, +it will NOT be located inside either of the two shieldcan areas. + +Two signal traces VCCS and VBATS will need to run from wherever the charging +circuit ends up residing on the board to corresponding U202 Iota chip terminals +inside the baseband core shieldcan. These traces do not carry current, instead +they are differential inputs to a voltage-measuring ADC, specifically measuring +the voltage drop across R407 and thus deducing the current that flows through +the charging circuit at each given moment. + +Galvanically VBAT (board-wide battery power distribution) and VBATS (one side +of the differential pair measuring the voltage across R407) are the same net, +but we would like them to be seen as two separate nets by our EDA tools, to +facilitate proper routing. The Mother's idea is to use intnoconn feature of +pcb-rnd: + +http://repo.hu/cgi-bin/pool.cgi?project=pcb-rnd&cmd=show&node=intnoconn + +More specifically, the Mother's idea is that the subcircuit representing R407 +will have 4 terminals rather than 2, with terminal numbers assigned as follows: + +Pin 1 = resistor side 1, surface layer +Pin 2 = resistor side 1, inner layer +Pin 3 = resistor side 2, surface layer +Pin 4 = resistor side 2, inner layer + +The idea is to include in-pad microvias going one layer down inside the +subcircuit, and put terminals 2 and 4 on the inner layer. Terminals 1 & 2 will +form one intnoconn group, and terminals 3 & 4 will form the other intnoconn +group. Surface traces carrying the charging current will connect to terminals +1 and 3, whereas sensing nets VCCS and VBATS will connect to terminals 2 and 4 +on the inner layer. + +Our current ueda source implements this idea at the netlist level; creation of +the corresponding pcb-rnd subcircuit remains TBD.
--- a/venus/src/MCL Sun Nov 21 20:20:38 2021 +0000 +++ b/venus/src/MCL Mon Nov 22 03:03:15 2021 +0000 @@ -911,7 +911,8 @@ hier=mob.chg.Rmeas value=0.2R footprint=TBD - npins=2 + pinout=resistor_with_sense.pinout + npins=4 # attenuators in the Tx path from Rita to PA part chip_atten:
--- a/venus/src/periph/charging_circuit.v Sun Nov 21 20:20:38 2021 +0000 +++ b/venus/src/periph/charging_circuit.v Mon Nov 22 03:03:15 2021 +0000 @@ -10,17 +10,19 @@ input ICTL, PCHG; output VCCS, VBATS; -wire mid; +wire mid1, mid2; -Si9407AEY Q401 (.G(ICTL), .S(VCHG), .D(mid)); +Si9407AEY Q401 (.G(ICTL), .S(VCHG), .D(mid1)); capacitor C401 (ICTL, VCHG); -resistor Rprech (PCHG, mid); +resistor Rprech (PCHG, mid1); -misc_diode D404 (.A(mid), .C(VCCS)); +misc_diode D404 (.A(mid1), .C(mid2)); -resistor Rmeas (VCCS, VBATS); - -starpoint VBATS_join (VBAT, VBATS); +resistor_with_sense Rmeas (.side1_current(mid2), + .side1_sense(VCCS), + .side2_current(VBAT), + .side2_sense(VBATS) + ); endmodule
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/venus/src/pinouts/resistor_with_sense.pinout Mon Nov 22 03:03:15 2021 +0000 @@ -0,0 +1,5 @@ +#meaning pinnum +side1_current 1 +side1_sense 2 +side2_current 3 +side2_sense 4
--- a/venus/src/primitives Sun Nov 21 20:20:38 2021 +0000 +++ b/venus/src/primitives Mon Nov 22 03:03:15 2021 +0000 @@ -72,3 +72,11 @@ basic_LED mapped_pins (A, C); misc_diode mapped_pins (A, C); switch_2pin numpins 2; + +/* + * Resistor footprint with two extra "virtual pins" for sensing - see + * ../doc/Charging-circuit for explanation. + */ + +resistor_with_sense mapped_pins (side1_current, side1_sense, + side2_current, side2_sense);