# HG changeset patch
# User Mychaela Falconia <falcon@freecalypso.org>
# Date 1637282101 0
# Node ID df6086f8788df329d6066494425bcc7117933e36
# Parent  c2b562611ed7196775c392098b40ac872420e22f
venus/src/pinouts: from FCDEV3B and Tango

diff -r c2b562611ed7 -r df6086f8788d venus/src/pinouts/EMB9.pinout
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/pinouts/EMB9.pinout	Fri Nov 19 00:35:01 2021 +0000
@@ -0,0 +1,6 @@
+E:1	1
+B:1	2
+C:2	3
+E:2	4
+B:2	5
+C:1	6
diff -r c2b562611ed7 -r df6086f8788d venus/src/pinouts/HVC375B.pinout
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/pinouts/HVC375B.pinout	Fri Nov 19 00:35:01 2021 +0000
@@ -0,0 +1,2 @@
+Cathode		1
+Anode		2
diff -r c2b562611ed7 -r df6086f8788d venus/src/pinouts/TPA6203A1-bga.pinmap
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/pinouts/TPA6203A1-bga.pinmap	Fri Nov 19 00:35:01 2021 +0000
@@ -0,0 +1,10 @@
+# TPA6203A1 pin function to ball number mapping for the BGA package
+
+BYPASS		C1
+GND		B2
+In_neg		C3
+In_pos		C2
+SHUTDOWN	B1
+VDD		A3
+Out_pos		B3
+Out_neg		A1
diff -r c2b562611ed7 -r df6086f8788d venus/src/pinouts/TPA6203A1-bga.pkg
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/pinouts/TPA6203A1-bga.pkg	Fri Nov 19 00:35:01 2021 +0000
@@ -0,0 +1,3 @@
+rows	ABC
+columns	3
+hole	A2
diff -r c2b562611ed7 -r df6086f8788d venus/src/pinouts/TPA6203A1-conv.pinmap
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/pinouts/TPA6203A1-conv.pinmap	Fri Nov 19 00:35:01 2021 +0000
@@ -0,0 +1,10 @@
+# TPA6203A1 pin function to pin number mapping for classic pin packages
+
+BYPASS		2
+GND		7
+In_neg		4
+In_pos		3
+SHUTDOWN	1
+VDD		6
+Out_pos		5
+Out_neg		8
diff -r c2b562611ed7 -r df6086f8788d venus/src/pinouts/calypso-179ghh.pinout
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/pinouts/calypso-179ghh.pinout	Fri Nov 19 00:35:01 2021 +0000
@@ -0,0 +1,231 @@
+# This pinout mapping file is intended primarily for pin function annotation
+# in the post-MCL unet output, where the mapping is from the ball position
+# to the logical name, rather than the other way around.
+
+#logical function	179GHH package ball
+
+# ARM memory interface
+ADD0			F3
+ADD1			F2
+ADD2			G5
+ADD3			G4
+ADD4			G2
+ADD5			G3
+ADD6			H1
+ADD7			H3
+ADD8			H2
+ADD9			H4
+ADD10			H5
+ADD11			J1
+ADD12			J2
+ADD13			J3
+ADD14			J4
+ADD15			K3
+ADD16			K2
+ADD17			K4
+ADD18			J5
+ADD19			L1
+ADD20			L2
+ADD21			L3
+CS4/ADD22		D2
+
+DATA0			B7
+DATA1			D7
+DATA2			E7
+DATA3			D6
+DATA4			A6
+DATA5			C6
+DATA6			E6
+DATA7			C5
+DATA8			B5
+DATA9			D5
+DATA10			E5
+DATA11			B4
+DATA12			C4
+DATA13			D4
+DATA14			A3
+DATA15			B3
+
+FDP			F4
+RnW			B2
+nBHE			F5
+nBLE			E4
+nCS0			C2
+nCS1			C3
+nCS2			C1
+nCS3			D3
+nCS4			C11
+nFOE			E2
+nFWE			E3
+
+# TPU serial port
+TSPCLKX			J14
+TSPDI/IO4		H10
+TSPDO			H11
+TSPEN0			H13
+TSPEN1			H12
+TSPEN2			H14
+TSPEN3/nSCS2		G12
+
+# TPU parallel port
+TSPACT0			M12
+TSPACT1			M14
+TSPACT2			L12
+TSPACT3			L13
+TSPACT4			J10
+TSPACT5			K11
+TSPACT6			K13
+TSPACT7			K12
+TSPACT8			K14
+TSPACT9			J11
+TSPACT10		J12
+TSPACT11		J13
+
+# uWire interface
+SCLK			P9
+SDI/SDA			M9
+SDO			K8
+nSCS0/SCL		L9
+nSCS1			N9
+
+# IrDA UART
+TX_IRDA			C8
+RX_IRDA			D8
+TXIR_IRDA		C7
+RXIR_IRDA		A8
+SD_IRDA			B8
+
+# MODEM UART
+TX_MODEM		B9
+RX_MODEM		A9
+RTS_MODEM		E8
+DSR_MODEM/LPG		D9
+CTS_MODEM		C9
+
+# MCSI
+MCSI_TXD/IO9		L10
+MCSI_RXD/IO10		M10
+MCSI_CLK/IO11		N10
+MCSI_FSYNCH/IO12	K9
+
+# Generic I/O
+KBC0			N4
+KBC1			K5
+KBC2			L5
+KBC3			P5
+KBC4			M5
+
+KBR0			K6
+KBR1			M6
+KBR2			P6
+KBR3			N6
+KBR4			L6
+
+BU/PWT			K7
+LT/PWL			L7
+
+IO0			N3
+IO1			P3
+IO2			L4
+IO3/SIM_RnW		M4
+
+# Miscellaneous
+nRESET_OUT/IO7		N2
+nIBOOT			N1
+IDDQ			M2
+CLKTCXO			E13
+OSC32K_IN		C13
+OSC32K_OUT		B13
+
+CLK32K_OUT		C12
+CLK13M_OUT		F12
+nRESPWON		D12
+EXT_FIQ			P1
+EXT_IRQ			M3
+
+# Power & ground pins
+VDDS_MIF		A4
+VDDS_MIF		B6
+VDDS_MIF		G1
+VDDS_MIF		D1
+
+VDDS_2			A11
+VDDS_2			L14
+VDDS_1			N5
+
+VDD			A5
+VDD			B12
+VDD			N14
+VDD			P7
+VDD			M1
+VDD			E1
+
+VSS			F1
+VSS			N8
+VSS			K1
+VSS			P2
+VSS			P4
+VSS			P10
+VSS			P13
+VSS			G14
+VSS			A10
+VSS			A7
+VSS			A2
+VSS			B1
+
+VDDS_RTC		D13
+VDD_RTC			D14
+VSS_RTC			C14
+
+VDD_ANG			E11
+VSS_ANG			E12
+
+VDD_PLL			F11
+VSS_PLL			E14
+
+VSSO			A14
+
+# Power control
+TCXOEN			A12
+RFEN			A13
+ON_OFF			F10
+IT_WAKEUP		B14
+
+# JTAG & other debug
+nBSCAN			D11
+nEMU0			B11
+nEMU1			E10
+
+TDI			D10
+TDO			C10
+TCK			B10
+TMS			E9
+
+# Baseband serial port
+BFSR			L11
+BDR			K10
+BFSX			P12
+BDX			M11
+
+BCLKR/ARMCLK		P11
+BCLKX/IO6		N11
+
+# Voice serial port
+VDX			P14
+VDR			N13
+VFSRX			M13
+VCLKRX			N12
+
+# ARM serial port (SPI)
+MCUDI			N7
+MCUDO			M7
+MCUEN0			M8
+MCUEN1/IO8		P8
+MCUEN2/IO13		L8
+
+# SIM interface
+SIM_IO			G13
+SIM_CLK			F13
+SIM_RST			G10
+SIM_CD			G11
+SIM_PWCTRL/IO5		F14
diff -r c2b562611ed7 -r df6086f8788d venus/src/pinouts/chipatten-1to2.pinout
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/pinouts/chipatten-1to2.pinout	Fri Nov 19 00:35:01 2021 +0000
@@ -0,0 +1,4 @@
+In	1
+Out	2
+GND1	4
+GND2	3
diff -r c2b562611ed7 -r df6086f8788d venus/src/pinouts/chipatten-2to1.pinout
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/pinouts/chipatten-2to1.pinout	Fri Nov 19 00:35:01 2021 +0000
@@ -0,0 +1,4 @@
+In	2
+Out	1
+GND1	3
+GND2	4
diff -r c2b562611ed7 -r df6086f8788d venus/src/pinouts/iota-ggm.pinout
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/pinouts/iota-ggm.pinout	Fri Nov 19 00:35:01 2021 +0000
@@ -0,0 +1,104 @@
+# Mapping of Iota ABB signal connections from name to GGM package ball
+# based on Table 2-3 on page 18 of TWL3025_SWRS021.pdf
+
+#signal name	GGM package ball
+ADIN1		B6
+ADIN2		A6
+ADIN3		C7
+ADIN4		C6
+AFC		J4
+APC		K4
+AUXI		G7
+AUXON		K10
+AUXOP		K9
+BDLIM		F10
+BDLIP		F9
+BDLQM		E9
+BDLQP		E10
+BDR		J3
+BDX		J2
+BFSR		H3
+BFSX		K2
+BULIM		D10
+BULIP		D9
+BULQM		C9
+BULQP		C10
+CK13M		E4
+CK32K		E2
+DAC		H4
+DBBSCK		F4
+DBBSIO		E5
+DBBSRST		G4
+EARN		J10
+EARP		J9
+GNDA		G10
+GNDAV		G6
+GNDD		A3
+GNDL1		B9
+GNDL2		A9
+HSMICBIAS	K8
+HSMICP		K7
+HSO		H9
+IBIAS		B7
+ICTL		D6
+INT1		H6
+INT2		E6
+ITWAKEUP	D2
+LEDA		B8
+LEDB1		B10
+LEDB2		A10
+LEDC		C8
+MICBIAS		J8
+MICIN		H7
+MICIP		J7
+ON_nOFF		E3
+PCHG		B5
+PWON		F8
+REFGND		A7
+RESPWONz	D3
+RPWON		F7
+SIMCK		C4
+SIMIO		B3
+SIMRST		D4
+TCK		D8
+TDI		D7
+TDO		E7
+TDR		G3
+TEN		H1
+TEST3		J6
+TEST4		F6
+TESTRSTz	H8
+TESTV		G8
+TMS		E8
+UDR		K5
+UDX		J5
+UEN		K6
+UPR		C2
+VBACKUP		E1
+VBAT		A4
+VBATS		C5
+VCABB		G9
+VCCS		D5
+VCDBB		K1
+VCHG		A5
+VCIO1		A2
+VCIO2		A1
+VCK		K3
+VCMEM		G2
+VCRAM		F2
+VDR		F5
+VDX		H5
+VFS		G5
+VLMEM		F3
+VLRTC		C3
+VRABB		H10
+VRDBB		J1
+VREF		A8
+VRIO1		B2
+VRIO2		B1
+VRMEM		G1
+VRRAN		F1
+VRRTC		D1
+VRSIM		B4
+VSDBB		H2
+VXRTC		C1
diff -r c2b562611ed7 -r df6086f8788d venus/src/pinouts/pkg_100GGM.bgadef
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/pinouts/pkg_100GGM.bgadef	Fri Nov 19 00:35:01 2021 +0000
@@ -0,0 +1,3 @@
+rows	ABCDEFGHJK
+columns	10
+# no holes
diff -r c2b562611ed7 -r df6086f8788d venus/src/pinouts/pkg_179GHH.bgadef
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/pinouts/pkg_179GHH.bgadef	Fri Nov 19 00:35:01 2021 +0000
@@ -0,0 +1,7 @@
+rows	ABCDEFGHJKLMNP
+columns	14
+hole	F6-F9
+hole	G6-G9
+hole	H6-H9
+hole	J6-J9
+hole	A1
diff -r c2b562611ed7 -r df6086f8788d venus/src/pinouts/pkg_TLA064.bgadef
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/pinouts/pkg_TLA064.bgadef	Fri Nov 19 00:35:01 2021 +0000
@@ -0,0 +1,8 @@
+rows	ABCDEFGHJKLM
+columns	10
+hole	A2-A9 M2-M9
+hole	B1-L1 B10-L10
+hole	B1-B4 B7-B10
+hole	L1-L4 L7-L10
+hole	C2 C9 K2 K9
+hole	F5 F6 G5 G6
diff -r c2b562611ed7 -r df6086f8788d venus/src/pinouts/pkg_TLC056.bgadef
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/pinouts/pkg_TLC056.bgadef	Fri Nov 19 00:35:01 2021 +0000
@@ -0,0 +1,4 @@
+rows	ABCDEFGH
+columns	8
+hole	D4-D5 E4-E5
+hole	A1 A8 H1 H8
diff -r c2b562611ed7 -r df6086f8788d venus/src/pinouts/rpack4-ti.pinout
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/pinouts/rpack4-ti.pinout	Fri Nov 19 00:35:01 2021 +0000
@@ -0,0 +1,9 @@
+#pin name	pin number
+side1:1		1
+side2:1		2
+side1:2		3
+side2:2		4
+side1:3		5
+side2:3		6
+side1:4		7
+side2:4		8