# HG changeset patch # User Mychaela Falconia # Date 1638676154 0 # Node ID cf39d9352394e0424bf5890d3d45470b20207d0f # Parent 2dc128ba165983be47c0709459af07e8df644600 R407 intnoconn: use different terminal numbering on further thought diff -r 2dc128ba1659 -r cf39d9352394 venus/doc/Charging-circuit --- a/venus/doc/Charging-circuit Sun Dec 05 03:38:33 2021 +0000 +++ b/venus/doc/Charging-circuit Sun Dec 05 03:49:14 2021 +0000 @@ -34,15 +34,15 @@ will have 4 terminals rather than 2, with terminal numbers assigned as follows: Pin 1 = resistor side 1, surface layer -Pin 2 = resistor side 1, inner layer -Pin 3 = resistor side 2, surface layer +Pin 2 = resistor side 2, surface layer +Pin 3 = resistor side 1, inner layer Pin 4 = resistor side 2, inner layer The idea is to include in-pad microvias going one layer down inside the -subcircuit, and put terminals 2 and 4 on the inner layer. Terminals 1 & 2 will -form one intnoconn group, and terminals 3 & 4 will form the other intnoconn +subcircuit, and put terminals 3 and 4 on the inner layer. Terminals 1 & 3 will +form one intnoconn group, and terminals 2 & 4 will form the other intnoconn group. Surface traces carrying the charging current will connect to terminals -1 and 3, whereas sensing nets VCCS and VBATS will connect to terminals 2 and 4 +1 and 2, whereas sensing nets VCCS and VBATS will connect to terminals 3 and 4 on the inner layer. Our current ueda source implements this idea at the netlist level; creation of diff -r 2dc128ba1659 -r cf39d9352394 venus/src/pinouts/resistor_with_sense.pinout --- a/venus/src/pinouts/resistor_with_sense.pinout Sun Dec 05 03:38:33 2021 +0000 +++ b/venus/src/pinouts/resistor_with_sense.pinout Sun Dec 05 03:49:14 2021 +0000 @@ -1,5 +1,5 @@ #meaning pinnum side1_current 1 -side1_sense 2 -side2_current 3 +side2_current 2 +side1_sense 3 side2_sense 4