view venus/src/core/int_vcxo_passive.v @ 96:ae6951a70d2b

U403: change from 74LVC2G125 to 74LVC2G126 The two parts have the same footprint and pinout, but '126 3-state buffers have active-high OE inputs instead of active-low. The change is purely for software benefit: having GPIO 11/12 set to 1 correspond to that current contribution being enabled will be much more intuitive for developers and tinkerers.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 09 May 2022 19:27:11 +0000
parents d0b6c4915397
children
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/*
 * This module captures the mysterious all-passive circuit between Iota's
 * AFC output and Rita's XIN input as depicted on the Leonardo schematics.
 * This circuit defies understanding, but it appears in Openmoko's GSM
 * modem (unchanged from Leonardo) and that modem works, hence we deem
 * this voodoo circuit to be suitable for mindless copying w/o understanding...
 *
 * Note that C205 is not included here, as it's already been included
 * in the abb_block wrapper instead.
 */

module int_vcxo_passive (AFC_in, XIN_connection, GND);

input AFC_in, GND;
inout XIN_connection;

wire R217_to_xtal, xtal_to_R211, R211_to_C225;

resistor R217 (AFC_in, R217_to_xtal);
varactor_diode D200 (.C(R217_to_xtal), .A(GND));
capacitor C226 (R217_to_xtal, GND);
xtal_4pin_pkg xtal (.pin_1(xtal_to_R211), .pin_2(GND),
		    .pin_3(R217_to_xtal), .pin_4(GND));
resistor R211 (xtal_to_R211, R211_to_C225);
capacitor C224 (R211_to_C225, GND);
capacitor C225 (R211_to_C225, XIN_connection);

endmodule