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Venus: first version of Verilog for the Calypso core
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 19 Nov 2021 05:58:21 +0000
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/* RF Rx path from quadband FEM to Rita, DCS band, per Leonardo schematics */

module rfmatch_fem2rita_dcs (In_neg, In_pos, Out_neg, Out_pos);

input In_neg, In_pos;
output Out_neg, Out_pos;

inductor L607 (In_neg, Out_neg);
inductor L608 (In_pos, Out_pos);

capacitor C699 (Out_neg, Out_pos);

endmodule