FreeCalypso > hg > freecalypso-schem2
comparison venus/src/MCL @ 68:ef00bcf4a7ee
MCL: assign value to all capacitors
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Thu, 02 Dec 2021 05:53:13 +0000 |
| parents | 8f3df7a222f5 |
| children | de44df15cf05 |
comparison
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| 67:8f3df7a222f5 | 68:ef00bcf4a7ee |
|---|---|
| 3 # Capacitors | 3 # Capacitors |
| 4 | 4 |
| 5 C201: | 5 C201: |
| 6 # bypass cap for V-RTC near Calypso | 6 # bypass cap for V-RTC near Calypso |
| 7 hier=mob.core.bb.dbb.C201 | 7 hier=mob.core.bb.dbb.C201 |
| 8 value=100n | |
| 8 footprint=0402 | 9 footprint=0402 |
| 9 npins=2 | 10 npins=2 |
| 10 | 11 |
| 11 C202: | 12 C202: |
| 12 # 32.768 kHz Pierce osc cap, input | 13 # 32.768 kHz Pierce osc cap, input |
| 13 hier=mob.core.bb.dbb.C202 | 14 hier=mob.core.bb.dbb.C202 |
| 15 value=22p | |
| 14 footprint=0402 | 16 footprint=0402 |
| 15 npins=2 | 17 npins=2 |
| 16 | 18 |
| 17 C203: | 19 C203: |
| 18 # 32.768 kHz Pierce osc cap, output | 20 # 32.768 kHz Pierce osc cap, output |
| 19 hier=mob.core.bb.dbb.C203 | 21 hier=mob.core.bb.dbb.C203 |
| 22 value=22p | |
| 20 footprint=0402 | 23 footprint=0402 |
| 21 npins=2 | 24 npins=2 |
| 22 | 25 |
| 23 C204: | 26 C204: |
| 24 # cap on Iota VREF pin | 27 # cap on Iota VREF pin |
| 25 hier=mob.core.bb.abb.C204 | 28 hier=mob.core.bb.abb.C204 |
| 29 value=100n | |
| 26 footprint=0402 | 30 footprint=0402 |
| 27 npins=2 | 31 npins=2 |
| 28 | 32 |
| 29 C205: | 33 C205: |
| 30 # AFC output cap | 34 # AFC output cap |
| 31 hier=mob.core.bb.abb.C205 | 35 hier=mob.core.bb.abb.C205 |
| 36 value=33n | |
| 32 footprint=0402 | 37 footprint=0402 |
| 33 npins=2 | 38 npins=2 |
| 34 | 39 |
| 35 C208: | 40 C208: |
| 36 # cap on UPR | 41 # cap on UPR |
| 37 hier=mob.core.bb.abb.C208 | 42 hier=mob.core.bb.abb.C208 |
| 43 value=100n | |
| 38 footprint=0402 | 44 footprint=0402 |
| 39 npins=2 | 45 npins=2 |
| 40 | 46 |
| 41 C209: | 47 C209: |
| 42 # bypass cap on Calypso VDDS_MIF | 48 # bypass cap on Calypso VDDS_MIF |
| 43 hier=mob.core.bb.dbb.C209 | 49 hier=mob.core.bb.dbb.C209 |
| 50 value=100n | |
| 44 footprint=0402 | 51 footprint=0402 |
| 45 npins=2 | 52 npins=2 |
| 46 | 53 |
| 47 C210: | 54 C210: |
| 48 # bypass cap on Calypso VDDS_[12] | 55 # bypass cap on Calypso VDDS_[12] |
| 49 hier=mob.core.bb.dbb.C210 | 56 hier=mob.core.bb.dbb.C210 |
| 57 value=100n | |
| 50 footprint=0402 | 58 footprint=0402 |
| 51 npins=2 | 59 npins=2 |
| 52 | 60 |
| 53 C211: | 61 C211: |
| 54 # bypass cap on Calypso VDD (core) | 62 # bypass cap on Calypso VDD (core) |
| 55 hier=mob.core.bb.dbb.C211 | 63 hier=mob.core.bb.dbb.C211 |
| 64 value=100n | |
| 56 footprint=0402 | 65 footprint=0402 |
| 57 npins=2 | 66 npins=2 |
| 58 | 67 |
| 59 C212: | 68 C212: |
| 60 # bypass cap on Calypso VDD_PLL | 69 # bypass cap on Calypso VDD_PLL |
| 61 hier=mob.core.bb.dbb.C212 | 70 hier=mob.core.bb.dbb.C212 |
| 71 value=100n | |
| 62 footprint=0402 | 72 footprint=0402 |
| 63 npins=2 | 73 npins=2 |
| 64 | 74 |
| 65 C213: | 75 C213: |
| 66 # bypass cap on V-ABB | 76 # bypass cap on V-ABB |
| 67 hier=mob.core.bb.abb.C213 | 77 hier=mob.core.bb.abb.C213 |
| 78 value=4u7 | |
| 68 footprint=0805 | 79 footprint=0805 |
| 69 npins=2 | 80 npins=2 |
| 70 | 81 |
| 71 C214: | 82 C214: |
| 72 # bypass cap on V-DBB | 83 # bypass cap on V-DBB |
| 73 hier=mob.core.bb.abb.C214 | 84 hier=mob.core.bb.abb.C214 |
| 85 value=22u | |
| 74 footprint=0805 | 86 footprint=0805 |
| 75 npins=2 | 87 npins=2 |
| 76 | 88 |
| 77 C215: | 89 C215: |
| 78 # bypass cap on V-IO | 90 # bypass cap on V-IO |
| 79 hier=mob.core.bb.abb.C215 | 91 hier=mob.core.bb.abb.C215 |
| 92 value=10u | |
| 80 footprint=0805 | 93 footprint=0805 |
| 81 npins=2 | 94 npins=2 |
| 82 | 95 |
| 83 C216: | 96 C216: |
| 84 # bypass cap on V-FLASH | 97 # bypass cap on V-FLASH |
| 85 hier=mob.core.bb.abb.C216 | 98 hier=mob.core.bb.abb.C216 |
| 99 value=4u7 | |
| 86 footprint=0805 | 100 footprint=0805 |
| 87 npins=2 | 101 npins=2 |
| 88 | 102 |
| 89 C217: | 103 C217: |
| 90 # bypass cap on V-SRAM | 104 # bypass cap on V-SRAM |
| 91 hier=mob.core.bb.abb.C217 | 105 hier=mob.core.bb.abb.C217 |
| 106 value=4u7 | |
| 92 footprint=0805 | 107 footprint=0805 |
| 93 npins=2 | 108 npins=2 |
| 94 | 109 |
| 95 C218: | 110 C218: |
| 96 # bypass cap on V-SIM | 111 # bypass cap on V-SIM |
| 97 hier=mob.core.bb.abb.C218 | 112 hier=mob.core.bb.abb.C218 |
| 113 value=1u | |
| 98 footprint=0603 | 114 footprint=0603 |
| 99 npins=2 | 115 npins=2 |
| 100 | 116 |
| 101 C219: | 117 C219: |
| 102 # bypass cap on V-RTC | 118 # bypass cap on V-RTC |
| 103 hier=mob.core.bb.abb.C219 | 119 hier=mob.core.bb.abb.C219 |
| 120 value=1u | |
| 104 footprint=0603 | 121 footprint=0603 |
| 105 npins=2 | 122 npins=2 |
| 106 | 123 |
| 107 C220: | 124 C220: |
| 108 # one of the bypass caps on the VBAT power input to the ABB | 125 # one of the bypass caps on the VBAT power input to the ABB |
| 109 hier=mob.core.bb.abb.C220 | 126 hier=mob.core.bb.abb.C220 |
| 127 value=100n | |
| 110 footprint=0402 | 128 footprint=0402 |
| 111 npins=2 | 129 npins=2 |
| 112 | 130 |
| 113 C221: | 131 C221: |
| 114 # the other one - C220's twin | 132 # the other one - C220's twin |
| 115 hier=mob.core.bb.abb.C221 | 133 hier=mob.core.bb.abb.C221 |
| 134 value=100n | |
| 116 footprint=0402 | 135 footprint=0402 |
| 117 npins=2 | 136 npins=2 |
| 118 | 137 |
| 119 C223: | 138 C223: |
| 120 # extra (3rd) cap to ground in the 32.768 kHz crystal osc circuit | 139 # extra (3rd) cap to ground in the 32.768 kHz crystal osc circuit |
| 121 hier=mob.core.bb.dbb.C223 | 140 hier=mob.core.bb.dbb.C223 |
| 141 value=10p | |
| 122 footprint=0402 | 142 footprint=0402 |
| 123 npins=2 | 143 npins=2 |
| 124 | 144 |
| 125 C224: | 145 C224: |
| 126 hier=mob.core.rf.Rita_vcxo.vcxo_passive.C224 | 146 hier=mob.core.rf.Rita_vcxo.vcxo_passive.C224 |
| 147 value=4p7 | |
| 127 footprint=0402 | 148 footprint=0402 |
| 128 npins=2 | 149 npins=2 |
| 129 | 150 |
| 130 C225: | 151 C225: |
| 131 hier=mob.core.rf.Rita_vcxo.vcxo_passive.C225 | 152 hier=mob.core.rf.Rita_vcxo.vcxo_passive.C225 |
| 153 value=100p | |
| 132 footprint=0402 | 154 footprint=0402 |
| 133 npins=2 | 155 npins=2 |
| 134 | 156 |
| 135 C226: | 157 C226: |
| 136 hier=mob.core.rf.Rita_vcxo.vcxo_passive.C226 | 158 hier=mob.core.rf.Rita_vcxo.vcxo_passive.C226 |
| 137 footprint=0402 | 159 footprint=0402 |
| 160 value=DNP | |
| 161 part=none | |
| 138 npins=2 | 162 npins=2 |
| 139 | 163 |
| 140 C253: | 164 C253: |
| 141 # series cap in the 26 MHz signal from Rita to Calypso | 165 # series cap in the 26 MHz signal from Rita to Calypso |
| 142 hier=mob.core.clock_rf2dbb.C253 | 166 hier=mob.core.clock_rf2dbb.C253 |
| 167 value=1n | |
| 143 footprint=0402 | 168 footprint=0402 |
| 144 npins=2 | 169 npins=2 |
| 145 | 170 |
| 146 C295: | 171 C295: |
| 147 # cap in the analog I&Q circuit between Iota and Rita (the one for Q) | 172 # cap in the analog I&Q circuit between Iota and Rita (the one for Q) |
| 148 hier=mob.core.bb.abb.abb_rc_network.C295 | 173 hier=mob.core.bb.abb.abb_rc_network.C295 |
| 174 value=470p | |
| 149 footprint=0402 | 175 footprint=0402 |
| 150 npins=2 | 176 npins=2 |
| 151 | 177 |
| 152 C296: | 178 C296: |
| 153 # cap in the analog I&Q circuit between Iota and Rita (the one for I) | 179 # cap in the analog I&Q circuit between Iota and Rita (the one for I) |
| 154 hier=mob.core.bb.abb.abb_rc_network.C296 | 180 hier=mob.core.bb.abb.abb_rc_network.C296 |
| 181 value=470p | |
| 155 footprint=0402 | 182 footprint=0402 |
| 156 npins=2 | 183 npins=2 |
| 157 | 184 |
| 158 C306: | 185 C306: |
| 159 # VSIM bypass cap next to the SIM socket, per Leonardo schematics | 186 # VSIM bypass cap next to the SIM socket, per Leonardo schematics |
| 163 npins=2 | 190 npins=2 |
| 164 | 191 |
| 165 C318: | 192 C318: |
| 166 # bypass cap for V-SRAM near U301 | 193 # bypass cap for V-SRAM near U301 |
| 167 hier=mob.core.mem.C318 | 194 hier=mob.core.mem.C318 |
| 195 value=100n | |
| 168 footprint=0402 | 196 footprint=0402 |
| 169 npins=2 | 197 npins=2 |
| 170 | 198 |
| 171 C319: | 199 C319: |
| 172 # footprint for possible cap on U302 BYPASS pin | 200 # footprint for possible cap on U302 BYPASS pin |
| 177 npins=2 | 205 npins=2 |
| 178 | 206 |
| 179 C322: | 207 C322: |
| 180 # bypass cap for V-FLASH near U301 | 208 # bypass cap for V-FLASH near U301 |
| 181 hier=mob.core.mem.C322 | 209 hier=mob.core.mem.C322 |
| 210 value=100n | |
| 182 footprint=0402 | 211 footprint=0402 |
| 183 npins=2 | 212 npins=2 |
| 184 | 213 |
| 185 C323: | 214 C323: |
| 186 # Big capacitor next to the VBAT power input connector | 215 # Big capacitor next to the VBAT power input connector |
| 193 source=Mouser | 222 source=Mouser |
| 194 | 223 |
| 195 C330: | 224 C330: |
| 196 # power supply decoupling cap for U302 | 225 # power supply decoupling cap for U302 |
| 197 hier=mob.spkr.C330 | 226 hier=mob.spkr.C330 |
| 198 value=1uF | 227 value=1u |
| 199 footprint=0402 | 228 footprint=0603 |
| 200 npins=2 | 229 npins=2 |
| 201 | 230 |
| 202 C331: | 231 C331: |
| 203 # cap on U302 output | 232 # cap on U302 output |
| 204 hier=mob.spkr.C331 | 233 hier=mob.spkr.C331 |
| 228 npins=2 | 257 npins=2 |
| 229 | 258 |
| 230 # Cap in charging circuit between ICTL and VCHG | 259 # Cap in charging circuit between ICTL and VCHG |
| 231 C401: | 260 C401: |
| 232 hier=mob.chg.C401 | 261 hier=mob.chg.C401 |
| 233 value=22nF | 262 value=22n |
| 234 footprint=0402 | 263 footprint=0402 |
| 235 npins=2 | 264 npins=2 |
| 236 | 265 |
| 237 # Bypass cap for U401 | 266 # Bypass cap for U401 |
| 238 C402: | 267 C402: |
| 239 hier=mob.uart.U401_bypass | 268 hier=mob.uart.U401_bypass |
| 269 value=100n | |
| 240 footprint=0402 | 270 footprint=0402 |
| 241 npins=2 | 271 npins=2 |
| 242 | 272 |
| 243 # Bypass cap for U402 | 273 # Bypass cap for U402 |
| 244 C403: | 274 C403: |
| 245 hier=mob.sim.inv_bypass | 275 hier=mob.sim.inv_bypass |
| 276 value=100n | |
| 246 footprint=0402 | 277 footprint=0402 |
| 247 npins=2 | 278 npins=2 |
| 248 | 279 |
| 249 C404: | 280 C404: |
| 250 hier=mob.lcd.LCD_bypass_cap | 281 hier=mob.lcd.LCD_bypass_cap |
| 282 value=100n | |
| 251 footprint=0402 | 283 footprint=0402 |
| 252 npins=2 | 284 npins=2 |
| 253 | 285 |
| 254 C405: | 286 C405: |
| 255 hier=mob.lcd.bl.cursel.U403_bypass | 287 hier=mob.lcd.bl.cursel.U403_bypass |
| 288 value=100n | |
| 256 footprint=0402 | 289 footprint=0402 |
| 257 npins=2 | 290 npins=2 |
| 258 | 291 |
| 259 C406: | 292 C406: |
| 260 hier=mob.audio_hso.C22 | 293 hier=mob.audio_hso.C22 |
| 262 footprint=0402 | 295 footprint=0402 |
| 263 npins=2 | 296 npins=2 |
| 264 | 297 |
| 265 C407: | 298 C407: |
| 266 hier=mob.audio_hso.C23 | 299 hier=mob.audio_hso.C23 |
| 267 value=2.2u | 300 value=2u2 |
| 268 footprint=0603 | 301 footprint=0603 |
| 269 npins=2 | 302 npins=2 |
| 270 | 303 |
| 271 C408: | 304 C408: |
| 272 hier=mob.audio_hso.C37 | 305 hier=mob.audio_hso.C37 |
| 280 footprint=0402 | 313 footprint=0402 |
| 281 npins=2 | 314 npins=2 |
| 282 | 315 |
| 283 C410: | 316 C410: |
| 284 hier=mob.audio_main.C32 | 317 hier=mob.audio_main.C32 |
| 318 value=33p | |
| 285 footprint=0402 | 319 footprint=0402 |
| 286 npins=2 | 320 npins=2 |
| 287 | 321 |
| 288 C411: | 322 C411: |
| 289 hier=mob.audio_main.C21 | 323 hier=mob.audio_main.C21 |
| 324 value=100n | |
| 290 footprint=0402 | 325 footprint=0402 |
| 291 npins=2 | 326 npins=2 |
| 292 | 327 |
| 293 C412: | 328 C412: |
| 294 hier=mob.audio_main.C12 | 329 hier=mob.audio_main.C12 |
| 330 value=100n | |
| 295 footprint=0402 | 331 footprint=0402 |
| 296 npins=2 | 332 npins=2 |
| 297 | 333 |
| 298 C413: | 334 C413: |
| 299 hier=mob.audio_main.C13 | 335 hier=mob.audio_main.C13 |
| 300 value=10uF | 336 value=10u |
| 301 footprint=0805 | 337 footprint=0805 |
| 302 npins=2 | 338 npins=2 |
| 303 | 339 |
| 304 C414: | 340 C414: |
| 305 hier=mob.audio_main.C14 | 341 hier=mob.audio_main.C14 |
| 342 value=33p | |
| 306 footprint=0402 | 343 footprint=0402 |
| 307 npins=2 | 344 npins=2 |
| 308 | 345 |
| 309 C415: | 346 C415: |
| 310 hier=mob.audio_main.C15 | 347 hier=mob.audio_main.C15 |
| 348 value=33p | |
| 311 footprint=0402 | 349 footprint=0402 |
| 312 npins=2 | 350 npins=2 |
| 313 | 351 |
| 314 C416: | 352 C416: |
| 315 hier=mob.audio_main.C16 | 353 hier=mob.audio_main.C16 |
| 354 value=18p | |
| 316 footprint=0402 | 355 footprint=0402 |
| 317 npins=2 | 356 npins=2 |
| 318 | 357 |
| 319 C417: | 358 C417: |
| 320 hier=mob.audio_main.C17 | 359 hier=mob.audio_main.C17 |
| 360 value=33p | |
| 321 footprint=0402 | 361 footprint=0402 |
| 322 npins=2 | 362 npins=2 |
| 323 | 363 |
| 324 C418: | 364 C418: |
| 325 hier=mob.audio_main.C18 | 365 hier=mob.audio_main.C18 |
| 366 value=18p | |
| 326 footprint=0402 | 367 footprint=0402 |
| 327 npins=2 | 368 npins=2 |
| 328 | 369 |
| 329 C419: | 370 C419: |
| 330 hier=mob.audio_main.C19 | 371 hier=mob.audio_main.C19 |
| 372 value=33p | |
| 331 footprint=0402 | 373 footprint=0402 |
| 332 npins=2 | 374 npins=2 |
| 333 | 375 |
| 334 C420: | 376 C420: |
| 335 hier=mob.audio_hso.HSO_cap | 377 hier=mob.audio_hso.HSO_cap |
| 337 footprint=0805 | 379 footprint=0805 |
| 338 npins=2 | 380 npins=2 |
| 339 | 381 |
| 340 C600: | 382 C600: |
| 341 hier=mob.core.rf.rita2pa_hb.C600 | 383 hier=mob.core.rf.rita2pa_hb.C600 |
| 384 value=27p | |
| 342 footprint=0402 | 385 footprint=0402 |
| 343 npins=2 | 386 npins=2 |
| 344 | 387 |
| 345 C606: | 388 C606: |
| 346 hier=mob.core.rf.Rita_vcxo.rita.C606 | 389 hier=mob.core.rf.Rita_vcxo.rita.C606 |
| 390 value=100n | |
| 347 footprint=0402 | 391 footprint=0402 |
| 348 npins=2 | 392 npins=2 |
| 349 | 393 |
| 350 C607: | 394 C607: |
| 351 hier=mob.core.rf.Rita_vcxo.rita.C607 | 395 hier=mob.core.rf.Rita_vcxo.rita.C607 |
| 396 value=100p | |
| 352 footprint=0402 | 397 footprint=0402 |
| 353 npins=2 | 398 npins=2 |
| 354 | 399 |
| 355 C608: | 400 C608: |
| 356 hier=mob.core.rf.Rita_vcxo.rita.C608 | 401 hier=mob.core.rf.Rita_vcxo.rita.C608 |
| 402 value=100n | |
| 357 footprint=0402 | 403 footprint=0402 |
| 358 npins=2 | 404 npins=2 |
| 359 | 405 |
| 360 C609: | 406 C609: |
| 361 hier=mob.core.rf.Rita_vcxo.rita.C609 | 407 hier=mob.core.rf.Rita_vcxo.rita.C609 |
| 408 value=10p | |
| 362 footprint=0402 | 409 footprint=0402 |
| 363 npins=2 | 410 npins=2 |
| 364 | 411 |
| 365 C610: | 412 C610: |
| 366 hier=mob.core.rf.Rita_vcxo.rita.C610 | 413 hier=mob.core.rf.Rita_vcxo.rita.C610 |
| 414 value=100p | |
| 367 footprint=0402 | 415 footprint=0402 |
| 368 npins=2 | 416 npins=2 |
| 369 | 417 |
| 370 C613: | 418 C613: |
| 371 hier=mob.core.rf.Rita_vcxo.rita.C613 | 419 hier=mob.core.rf.Rita_vcxo.rita.C613 |
| 420 value=1u | |
| 372 footprint=0603 | 421 footprint=0603 |
| 373 npins=2 | 422 npins=2 |
| 374 | 423 |
| 375 C614: | 424 C614: |
| 376 hier=mob.core.rf.fem2rita_low.C614 | 425 hier=mob.core.rf.fem2rita_low.C614 |
| 426 value=100p | |
| 377 footprint=0402 | 427 footprint=0402 |
| 378 npins=2 | 428 npins=2 |
| 379 | 429 |
| 380 C615: | 430 C615: |
| 381 hier=mob.core.rf.fem2rita_low.C615 | 431 hier=mob.core.rf.fem2rita_low.C615 |
| 432 value=100p | |
| 382 footprint=0402 | 433 footprint=0402 |
| 383 npins=2 | 434 npins=2 |
| 384 | 435 |
| 385 C616: | 436 C616: |
| 386 hier=mob.core.rf.Rita_vcxo.rita.C616 | 437 hier=mob.core.rf.Rita_vcxo.rita.C616 |
| 438 value=100n | |
| 387 footprint=0402 | 439 footprint=0402 |
| 388 npins=2 | 440 npins=2 |
| 389 | 441 |
| 390 C617: | 442 C617: |
| 391 hier=mob.core.rf.Rita_vcxo.rita.C617 | 443 hier=mob.core.rf.Rita_vcxo.rita.C617 |
| 444 value=100p | |
| 392 footprint=0402 | 445 footprint=0402 |
| 393 npins=2 | 446 npins=2 |
| 394 | 447 |
| 395 C619: | 448 C619: |
| 396 hier=mob.core.rf.Rita_vcxo.rita.C619 | 449 hier=mob.core.rf.Rita_vcxo.rita.C619 |
| 450 value=1u | |
| 397 footprint=0603 | 451 footprint=0603 |
| 398 npins=2 | 452 npins=2 |
| 399 | 453 |
| 400 C620: | 454 C620: |
| 401 hier=mob.core.rf.Rita_vcxo.rita.C620 | 455 hier=mob.core.rf.Rita_vcxo.rita.C620 |
| 456 value=100n | |
| 402 footprint=0402 | 457 footprint=0402 |
| 403 npins=2 | 458 npins=2 |
| 404 | 459 |
| 405 C622: | 460 C622: |
| 406 hier=mob.core.rf.Rita_vcxo.rita.C622 | 461 hier=mob.core.rf.Rita_vcxo.rita.C622 |
| 462 value=1u | |
| 407 footprint=0603 | 463 footprint=0603 |
| 408 npins=2 | 464 npins=2 |
| 409 | 465 |
| 410 C624: | 466 C624: |
| 411 hier=mob.core.rf.fem2rita_pcs.C624 | 467 hier=mob.core.rf.fem2rita_pcs.C624 |
| 468 value=15p | |
| 412 footprint=0402 | 469 footprint=0402 |
| 413 npins=2 | 470 npins=2 |
| 414 | 471 |
| 415 C625: | 472 C625: |
| 416 hier=mob.core.rf.fem2rita_pcs.C625 | 473 hier=mob.core.rf.fem2rita_pcs.C625 |
| 474 value=15p | |
| 417 footprint=0402 | 475 footprint=0402 |
| 418 npins=2 | 476 npins=2 |
| 419 | 477 |
| 420 C628: | 478 C628: |
| 421 hier=mob.core.rf.Rita_vcxo.rita.XEN_cap | 479 hier=mob.core.rf.Rita_vcxo.rita.XEN_cap |
| 480 value=100n | |
| 422 footprint=0402 | 481 footprint=0402 |
| 423 npins=2 | 482 npins=2 |
| 424 | 483 |
| 425 C629: | 484 C629: |
| 426 hier=mob.core.rf.Rita_vcxo.rita.C629 | 485 hier=mob.core.rf.Rita_vcxo.rita.C629 |
| 486 value=100p | |
| 427 footprint=0402 | 487 footprint=0402 |
| 428 npins=2 | 488 npins=2 |
| 429 | 489 |
| 430 C630: | 490 C630: |
| 431 hier=mob.core.rf.Rita_vcxo.rita.C630 | 491 hier=mob.core.rf.Rita_vcxo.rita.C630 |
| 492 value=100p | |
| 432 footprint=0402 | 493 footprint=0402 |
| 433 npins=2 | 494 npins=2 |
| 434 | 495 |
| 435 C631: | 496 C631: |
| 436 hier=mob.core.rf.Rita_vcxo.rita.C631 | 497 hier=mob.core.rf.Rita_vcxo.rita.C631 |
| 498 value=100n | |
| 437 footprint=0402 | 499 footprint=0402 |
| 438 npins=2 | 500 npins=2 |
| 439 | 501 |
| 440 C632: | 502 C632: |
| 441 hier=mob.core.rf.Rita_vcxo.rita.C632 | 503 hier=mob.core.rf.Rita_vcxo.rita.C632 |
| 504 value=100n | |
| 442 footprint=0402 | 505 footprint=0402 |
| 443 npins=2 | 506 npins=2 |
| 444 | 507 |
| 445 C633: | 508 C633: |
| 446 hier=mob.core.rf.Rita_vcxo.rita.C633 | 509 hier=mob.core.rf.Rita_vcxo.rita.C633 |
| 510 value=100p | |
| 447 footprint=0402 | 511 footprint=0402 |
| 448 npins=2 | 512 npins=2 |
| 449 | 513 |
| 450 C634: | 514 C634: |
| 451 hier=mob.core.rf.Rita_vcxo.rita.C634 | 515 hier=mob.core.rf.Rita_vcxo.rita.C634 |
| 516 value=470n | |
| 452 footprint=0402 | 517 footprint=0402 |
| 453 npins=2 | 518 npins=2 |
| 454 | 519 |
| 455 C635: | 520 C635: |
| 456 hier=mob.core.rf.FEM.C635 | 521 hier=mob.core.rf.FEM.C635 |
| 522 value=47p | |
| 457 footprint=0402 | 523 footprint=0402 |
| 458 npins=2 | 524 npins=2 |
| 459 | 525 |
| 460 C643: | 526 C643: |
| 461 hier=mob.core.rf.FEM.C643 | 527 hier=mob.core.rf.FEM.C643 |
| 528 value=33p | |
| 462 footprint=0402 | 529 footprint=0402 |
| 463 npins=2 | 530 npins=2 |
| 464 | 531 |
| 465 C644: | 532 C644: |
| 466 hier=mob.core.rf.FEM.C644 | 533 hier=mob.core.rf.FEM.C644 |
| 534 value=12p | |
| 467 footprint=0402 | 535 footprint=0402 |
| 468 npins=2 | 536 npins=2 |
| 469 | 537 |
| 470 C645: | 538 C645: |
| 471 hier=mob.core.rf.FEM.C645 | 539 hier=mob.core.rf.FEM.C645 |
| 540 value=47p | |
| 472 footprint=0402 | 541 footprint=0402 |
| 473 npins=2 | 542 npins=2 |
| 474 | 543 |
| 475 C648: | 544 C648: |
| 476 hier=mob.core.rf.PA.C648 | 545 hier=mob.core.rf.PA.C648 |
| 546 value=680p | |
| 477 footprint=0402 | 547 footprint=0402 |
| 478 npins=2 | 548 npins=2 |
| 479 | 549 |
| 480 C651: | 550 C651: |
| 481 # PA power supply small cap | 551 # PA power supply small cap |
| 482 hier=mob.core.rf.PA.C651 | 552 hier=mob.core.rf.PA.C651 |
| 553 value=12p | |
| 483 footprint=0402 | 554 footprint=0402 |
| 484 npins=2 | 555 npins=2 |
| 485 | 556 |
| 486 C652: | 557 C652: |
| 487 # PA power supply small cap | 558 # PA power supply small cap |
| 488 hier=mob.core.rf.PA.C652 | 559 hier=mob.core.rf.PA.C652 |
| 560 value=47p | |
| 489 footprint=0402 | 561 footprint=0402 |
| 490 npins=2 | 562 npins=2 |
| 491 | 563 |
| 492 C653: | 564 C653: |
| 493 # PA power supply small cap | 565 # PA power supply small cap |
| 494 hier=mob.core.rf.PA.C653 | 566 hier=mob.core.rf.PA.C653 |
| 567 value=100n | |
| 495 footprint=0402 | 568 footprint=0402 |
| 496 npins=2 | 569 npins=2 |
| 497 | 570 |
| 498 C654: | 571 C654: |
| 499 # PA power supply big cap | 572 # PA power supply big cap |
| 500 hier=mob.core.rf.PA.C654 | 573 hier=mob.core.rf.PA.C654 |
| 574 value=22u | |
| 501 footprint=0805 | 575 footprint=0805 |
| 502 npins=2 | 576 npins=2 |
| 503 | 577 |
| 504 C655: | 578 C655: |
| 505 hier=mob.core.rf.rita2pa_lb.C655 | 579 hier=mob.core.rf.rita2pa_lb.C655 |
| 580 value=47p | |
| 506 footprint=0402 | 581 footprint=0402 |
| 507 npins=2 | 582 npins=2 |
| 508 | 583 |
| 509 C656: | 584 C656: |
| 510 hier=mob.core.rf.PA.C656 | 585 hier=mob.core.rf.PA.C656 |
| 586 value=100p | |
| 511 footprint=0402 | 587 footprint=0402 |
| 512 npins=2 | 588 npins=2 |
| 513 | 589 |
| 514 C698: | 590 C698: |
| 515 hier=mob.core.rf.Rita_vcxo.rita.XEN_cap2 | 591 hier=mob.core.rf.Rita_vcxo.rita.XEN_cap2 |
| 592 value=10u | |
| 516 footprint=0805 | 593 footprint=0805 |
| 517 npins=2 | 594 npins=2 |
| 518 | 595 |
| 519 C699: | 596 C699: |
| 520 hier=mob.core.rf.fem2rita_dcs.C699 | 597 hier=mob.core.rf.fem2rita_dcs.C699 |
| 598 value=0p5 | |
| 521 footprint=0402 | 599 footprint=0402 |
| 522 npins=2 | 600 npins=2 |
| 523 | 601 |
| 524 C701: | 602 C701: |
| 525 hier=usb.usb.FT2232D.VCCIOA_bypass_cap | 603 hier=usb.usb.FT2232D.VCCIOA_bypass_cap |
| 604 value=100n | |
| 526 footprint=0402 | 605 footprint=0402 |
| 527 npins=2 | 606 npins=2 |
| 528 | 607 |
| 529 C702: | 608 C702: |
| 530 hier=usb.usb.FT2232D.VCCIOB_bypass_cap | 609 hier=usb.usb.FT2232D.VCCIOB_bypass_cap |
| 610 value=100n | |
| 531 footprint=0402 | 611 footprint=0402 |
| 532 npins=2 | 612 npins=2 |
| 533 | 613 |
| 534 C703: | 614 C703: |
| 535 hier=usb.usb.FT2232D.AVCC_cap | 615 hier=usb.usb.FT2232D.AVCC_cap |
| 616 value=100n | |
| 536 footprint=0402 | 617 footprint=0402 |
| 537 npins=2 | 618 npins=2 |
| 538 | 619 |
| 539 C704: | 620 C704: |
| 540 hier=usb.usb.FT2232D.FTDI_3V3_cap | 621 hier=usb.usb.FT2232D.FTDI_3V3_cap |
| 622 value=100n | |
| 541 footprint=0402 | 623 footprint=0402 |
| 542 npins=2 | 624 npins=2 |
| 543 | 625 |
| 544 C705: | 626 C705: |
| 545 hier=usb.usb.FT2232D.XTIN_cap | 627 hier=usb.usb.FT2232D.XTIN_cap |
| 628 value=22p | |
| 546 footprint=0402 | 629 footprint=0402 |
| 547 npins=2 | 630 npins=2 |
| 548 | 631 |
| 549 C706: | 632 C706: |
| 550 hier=usb.usb.FT2232D.XTOUT_cap | 633 hier=usb.usb.FT2232D.XTOUT_cap |
| 634 value=22p | |
| 551 footprint=0402 | 635 footprint=0402 |
| 552 npins=2 | 636 npins=2 |
| 553 | 637 |
| 554 C707: | 638 C707: |
| 555 hier=usb.usb.P_5V_cap | 639 hier=usb.usb.P_5V_cap |
| 640 value=100n | |
| 556 footprint=0402 | 641 footprint=0402 |
| 557 npins=2 | 642 npins=2 |
| 558 | 643 |
| 559 C708: | 644 C708: |
| 560 hier=usb.usb.P_5V_cap2 | 645 hier=usb.usb.P_5V_cap2 |
| 646 value=22u | |
| 561 footprint=0805 | 647 footprint=0805 |
| 562 npins=2 | 648 npins=2 |
| 563 | 649 |
| 564 C709: | 650 C709: |
| 565 hier=usb.reg_3V3.input_cap | 651 hier=usb.reg_3V3.input_cap |
| 652 value=1u | |
| 566 footprint=0603 | 653 footprint=0603 |
| 567 npins=2 | 654 npins=2 |
| 568 | 655 |
| 569 C710: | 656 C710: |
| 570 hier=usb.reg_3V3.output_cap | 657 hier=usb.reg_3V3.output_cap |
| 658 value=1u | |
| 571 footprint=0603 | 659 footprint=0603 |
| 572 npins=2 | 660 npins=2 |
| 573 | 661 |
| 574 C711: | 662 C711: |
| 575 hier=usb.buf.bypass_cap | 663 hier=usb.buf.bypass_cap |
| 664 value=100n | |
| 576 footprint=0402 | 665 footprint=0402 |
| 577 npins=2 | 666 npins=2 |
| 578 | 667 |
| 579 C712: | 668 C712: |
| 580 hier=usb.bctl.od_buf_bypass_cap | 669 hier=usb.bctl.od_buf_bypass_cap |
| 670 value=100n | |
| 581 footprint=0402 | 671 footprint=0402 |
| 582 npins=2 | 672 npins=2 |
| 583 | 673 |
| 584 # LEDs and other diodes | 674 # LEDs and other diodes |
| 585 | 675 |
