FreeCalypso > hg > freecalypso-schem2
comparison venus/src/core/core.v @ 86:adc84e0e98d6
add 74AXP1T34 buffer for flash reset
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Fri, 10 Dec 2021 06:20:19 +0000 |
parents | 5ee03a306da3 |
children | 96e02b1b2374 |
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85:93b238ad7d6e | 86:adc84e0e98d6 |
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84 | 84 |
85 /* wires between baseband and memory */ | 85 /* wires between baseband and memory */ |
86 wire Vflash, Vsram; | 86 wire Vflash, Vsram; |
87 wire MCU_FDP, MCU_nBLE, MCU_nBHE; | 87 wire MCU_FDP, MCU_nBLE, MCU_nBHE; |
88 wire INT_nCS0, INT_nCS1, INT_nCS2; | 88 wire INT_nCS0, INT_nCS1, INT_nCS2; |
89 wire ON_nOFF_2V8; | |
89 | 90 |
90 /* instantiate the blocks! */ | 91 /* instantiate the blocks! */ |
91 | 92 |
92 baseband bb (.GND(GND), | 93 baseband bb (.GND(GND), |
93 .VBAT(VBAT1), | 94 .VBAT(VBAT1), |
97 .Vsram(Vsram), | 98 .Vsram(Vsram), |
98 .PWON(PWON), | 99 .PWON(PWON), |
99 .RPWON(RPWON), | 100 .RPWON(RPWON), |
100 .nTESTRESET(nTESTRESET), | 101 .nTESTRESET(nTESTRESET), |
101 .ON_nOFF(ON_nOFF), | 102 .ON_nOFF(ON_nOFF), |
103 .ON_nOFF_2V8(ON_nOFF_2V8), | |
102 .CLKTCXO_IN(Clock_26MHz_DBB_in), | 104 .CLKTCXO_IN(Clock_26MHz_DBB_in), |
103 .TDI(TDI), | 105 .TDI(TDI), |
104 .TDO(TDO), | 106 .TDO(TDO), |
105 .TCK(TCK), | 107 .TCK(TCK), |
106 .TMS(TMS), | 108 .TMS(TMS), |
198 .MCU_D(MCU_D[15:0]), | 200 .MCU_D(MCU_D[15:0]), |
199 .MCU_nRD(MCU_nFOE), | 201 .MCU_nRD(MCU_nFOE), |
200 .MCU_nWR(MCU_RnW), | 202 .MCU_nWR(MCU_RnW), |
201 .MCU_nBHE(MCU_nBHE), | 203 .MCU_nBHE(MCU_nBHE), |
202 .MCU_nBLE(MCU_nBLE), | 204 .MCU_nBLE(MCU_nBLE), |
203 .Flash_RST(MCU_FDP), | 205 .Flash_RST(ON_nOFF_2V8), |
204 .CS_flash1(INT_nCS0), | 206 .CS_flash1(INT_nCS0), |
205 .CS_RAM(INT_nCS1) | 207 .CS_RAM(INT_nCS1) |
206 ); | 208 ); |
207 | 209 |
208 rf_section rf (.GND(GND), | 210 rf_section rf (.GND(GND), |