# HG changeset patch
# User Mychaela Falconia <falcon@freecalypso.org>
# Date 1583365311 0
# Node ID 2ceb1f263e198741895ed866c7e2a3cdec413cf0
# Parent  bc3391aa3d35f4d3452a9aeda05502ccfea1e41b
frbl/reconst: first attempt to compile boot.c

diff -r bc3391aa3d35 -r 2ceb1f263e19 frbl/reconst/Makefile
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/frbl/reconst/Makefile	Wed Mar 04 23:41:51 2020 +0000
@@ -0,0 +1,11 @@
+CFLAGS=	-mn -mt -mw -me -pw2
+CPPFLAGS=-DTOOL_CHOICE=0 -D_TMS470 -I. -Iinc
+OBJS=	boot.obj
+
+all:	${OBJS}
+
+%.obj:	%.c
+	./cl470 -q -c ${CFLAGS} ${CPPFLAGS} $<
+
+clean:
+	rm -f *.obj
diff -r bc3391aa3d35 -r 2ceb1f263e19 frbl/reconst/boot.c
--- a/frbl/reconst/boot.c	Wed Mar 04 23:17:27 2020 +0000
+++ b/frbl/reconst/boot.c	Wed Mar 04 23:41:51 2020 +0000
@@ -45,7 +45,7 @@
 #if (CHIPSET == 3)
 asm("STACK_INIT      .equ     03000000h");
 asm("STACK_ADD       .equ     00020000h ; 128kB");
-#elif (CHIPSET == 7)
+#elif (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11)
 asm("STACK_INIT      .equ     00800000h");
 asm("STACK_ADD       .equ     00020000h ; 128kB");
 #elif (CHIPSET == 12)
@@ -203,7 +203,8 @@
  ******************************************************************************/
 #if (CHIPSET == 3)
     #define IQ_MASK (0xFFFFFA02) /* Mask Interrupt Register */
-#elif (CHIPSET == 7) || (CHIPSET == 12) 
+#elif (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11) \
+	|| (CHIPSET == 12) 
     #define IQ_MASK1 (0xFFFFFA08) /* Mask Interrupt Register 1 */
     #define IQ_MASK2 (0xFFFFFA0A) /* Mask Interrupt Register 2 */
 #else
@@ -232,7 +233,7 @@
     // Mask all interrupts
 #if (CHIPSET == 3)
     *((volatile uint16 *) IQ_MASK) = 0xFFFF;
-#elif (CHIPSET == 7)
+#elif (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11)
     *((volatile uint16 *) IQ_MASK1) = 0xFFFF;
     *((volatile uint16 *) IQ_MASK2) = 0x001F;
 #elif (CHIPSET == 12)
@@ -249,7 +250,7 @@
 #endif
 
 
-#if (CHIPSET == 3) || (CHIPSET == 7)
+#if (CHIPSET == 3) || (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11)
     // FIXME: Describe exactly how the CSs are initialized
     *((volatile uint16 *) CS0_MEM_REG) = 0x2A1;
     *((volatile uint16 *) CS1_MEM_REG) = 0x2A1;
@@ -273,7 +274,7 @@
     clk |= (2 << 4);
     *(volatile uint16 *) CLKM_CNTL_ARM_CLK = clk;
 
-#elif (CHIPSET == 7)
+#elif (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11)
 
     // Reset DPLL register
     * (volatile uint16 *) MEM_DPLL_ADDR = DPLL_RESET_VALUE;
diff -r bc3391aa3d35 -r 2ceb1f263e19 frbl/reconst/chipset.cfg
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/frbl/reconst/chipset.cfg	Wed Mar 04 23:41:51 2020 +0000
@@ -0,0 +1,1 @@
+#define	CHIPSET	10
diff -r bc3391aa3d35 -r 2ceb1f263e19 frbl/reconst/cl470
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/frbl/reconst/cl470	Wed Mar 04 23:41:51 2020 +0000
@@ -0,0 +1,5 @@
+#!/bin/sh
+C_DIR='c:/Dvpt_tools/Codegen/TMS4701x_1.22e/NT'
+TZ=GMT
+export C_DIR TZ
+exec nowhine 'c:/Dvpt_tools/Codegen/TMS4701x_1.22e/NT/cl470.exe' "$@"