diff bootrom.notes @ 17:d2206cb5f8b4

boot ROM re: got through the <w handler
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Thu, 25 Apr 2013 04:07:10 +0000
parents 383a4ef12551
children 123cb5021b64
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line diff
--- a/bootrom.notes	Thu Apr 25 03:16:17 2013 +0000
+++ b/bootrom.notes	Thu Apr 25 04:07:10 2013 +0000
@@ -48,6 +48,9 @@
 
 <a
 
+Seems to be a reset command that throws everything back to the initial state.
+Does not seem to produce a response.
+
 <b
 
 Followed by 4 bytes, giving a 32-bit value in MSB-first order.  The value is
@@ -101,6 +104,20 @@
 for a single block (both bytes after <w set to 01), the maximum allowed
 payload length is 1015 (0x3F7) bytes.
 
+The checksum of each block is computed as a simple ripple-carry sum
+(in a 32-bit ARM register) of:
+	+ the word-sized payload byte count from the command
+	+ each of the 4 bytes of the load address
+	+ constant 5
+	+ each byte of the payload data
+
+The code then takes a one's complement of the least significant byte
+of the above sum, and adds that (plain ripple-carry addition)
+to the accum in 800528 (a 16-bit variable).
+
+Good response: >w
+Error response: >W <err code byte from 800531>
+
 RAM layout:
 
 800000 7 words:
@@ -155,6 +172,10 @@
 800530: byte indicates validity of the received '<w' command:
 	0 means valid, 1 means something bad
 	init to 0 by 0x11c
+800531: byte error code to return to host as the 3rd (and last) byte
+	of the >W message
+	set to 02 if the 800530 flag was set
+	set to 01 if the 0x730 routine detects bad address
 
 800534: byte initialized to 0x00, then may be set to 1 by the 0xfb4
 	routine if it selects /1 clock mode.