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comparison FC-handset-spec @ 52:cfe8623b915d

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FC-handset-spec: UART signal pull-up/down documented
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 11 Jun 2021 18:29:06 +0000
parents 7933c3a1b5e0
children 016f8cf2418c
comparison
equal deleted inserted replaced
51:7933c3a1b5e0 52:cfe8623b915d
807 second debug UART channel is only two wires: 807 second debug UART channel is only two wires:
808 808
809 USB UART 809 USB UART
810 DTE signal Calypso signal 810 DTE signal Calypso signal
811 ------------------------------ 811 ------------------------------
812 TxD RX_IRDA 812 TxD2 RX_IRDA
813 RxD TX_IRDA 813 RxD2 TX_IRDA
814 814
815 However, as shown in the next section, these signals cannot be simply connected 815 However, as shown in the next section, these signals cannot be simply connected
816 between Calypso and FT2232x, and a more complicated scheme needs to be 816 between Calypso and FT2232x, instead a more complicated scheme needs to be
817 implemented instead. 817 implemented.
818 818
819 1.12.2. USB and mobile power domains 819 1.12.2. USB and mobile power domains
820 820
821 Our FC Libre Dumbphone handset will have two principal power domains in it: the 821 Our FC Libre Dumbphone handset will have two principal power domains in it: the
822 main battery-powered mobile domain, and the USB domain. This power domain 822 main battery-powered mobile domain, and the USB domain. This power domain
914 output is high, there may be current flowing into that high output (not sourcing 914 output is high, there may be current flowing into that high output (not sourcing
915 out of it as normally expected), which is a bad condition for CMOS outputs. 915 out of it as normally expected), which is a bad condition for CMOS outputs.
916 However, this current will be limited to a maximum of about 40 uA 916 However, this current will be limited to a maximum of about 40 uA
917 ((4.2-3.3 V) / 22 kOhm), and my feeling is that such small current won't hurt 917 ((4.2-3.3 V) / 22 kOhm), and my feeling is that such small current won't hurt
918 Nexperia LVC buffers. 918 Nexperia LVC buffers.
919
920 1.12.2.2.1. Signal pull-up/down directions
921
922 Of the 4 UART signals going from FT2232x to Calypso (see section 1.12.1), TxD
923 and TxD2 MUST be sensed high by Calypso when no USB host is connected, hence
924 they will need the two chained LVC buffers with pull-ups to VBAT in between, as
925 described above. RTS and DTR are less critical in that either high or low level
926 would be acceptable, as long as it is stable and not floating. However, it is
927 slightly preferable to have DTR pulled up like TxD (to be sensed as logically
928 negated), and to have RTS (flow control signal going to CTS_MODEM) pulled down,
929 to be sensed as logically asserted.
930
931 The approach chosen by the Mother is to have TxD, TxD2 and DTR pulled up to VBAT
932 as described above, and to have RTS pulled down to GND. The value of the pull-
933 down resistor to GND will be 47 kOhm, and the USB-side-powered LVC buffer can be
934 skipped for this signal - that buffer is only needed in order to work correctly
935 with the pull-up to VBAT.
936
937 With only 3 FT2232x-to-Calypso signals needing to go through a USB-side-powered
938 LVC buffer, and with 3 slots remaining available in the 74LVC541A buffer from
939 section 1.12.2.1, that one 74LVC541A IC can serve both signal directions (5
940 signals from Calypso to FT2232x and 3 signals going the other way), reducing the
941 component count.