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comparison L1/include/l1_trace.h @ 3:f93dab57b032

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L1/include: TCS211-based version restored
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 09 Jun 2016 00:45:00 +0000
parents 75a11d740a02
children
comparison
equal deleted inserted replaced
2:7c13c26f1aa4 3:f93dab57b032
34 #define TRACE_CHECKING_OPCODE 1 34 #define TRACE_CHECKING_OPCODE 1
35 35
36 #define TRACE_CHECK_RESULT_OPCODE 1023 // WARNING: UL opcode 1023 reseved for trace version 36 #define TRACE_CHECK_RESULT_OPCODE 1023 // WARNING: UL opcode 1023 reseved for trace version
37 // (cannot be used for trace) 37 // (cannot be used for trace)
38 38
39 #if (GSM_IDLE_RAM != 0)
40 #define INTRAM_TRACE_BUFFER_SIZE 128
41 extern UWORD32 task_bitmap_idle_ram[2];
42 extern UWORD32 mem_task_bitmap_idle_ram[2];
43 extern CHAR intram_trace_buffer[INTRAM_TRACE_BUFFER_SIZE];
44 extern CHAR * intram_buffer_current_ptr;
45 extern T_RVT_MSG_LG intram_trace_size;
46
47 void l1_intram_send_trace(void);
48
49 #endif
50
51 /****************************** ASCII trace only *****************************************/ 39 /****************************** ASCII trace only *****************************************/
52 40
53 #if (L1_BINARY_TRACE == 0) || (TRACE_TYPE == 5) 41 #if (L1_BINARY_TRACE == 0) || (TRACE_TYPE == 5)
54
55 #if (OP_L1_STANDALONE == 1) 42 #if (OP_L1_STANDALONE == 1)
56 43 #define DEFAULT_DYN_TRACE_CONFIG 0x00000A67
57 #if (L1_DYN_DSP_DWNLD == 1 && CODE_VERSION == SIMULATION)
58
59 #if (L1_FF_MULTIBAND == 0)
60 // Dyn DWNLD (0x0001000) MP3 & MIDI traces activated (0x4000 and 0x2000)
61 #define DEFAULT_DYN_TRACE_CONFIG 0x00016AE7
62 #else
63 #define DEFAULT_DYN_TRACE_CONFIG ( 0x00016AE7 | (1<<L1_DYN_TRACE_MULTIBAND) )
64 #endif
65
66 #else // Below for normal L1 standalone with dynamic download
67
68 #if (L1_FF_MULTIBAND == 0)
69 // MP3 & MIDI traces activated (0x4000 and 0x2000)
70 #define DEFAULT_DYN_TRACE_CONFIG 0x028A6AE7
71 #else
72 #define DEFAULT_DYN_TRACE_CONFIG ( 0x028A6AE7 | (1<<L1_DYN_TRACE_MULTIBAND) )
73 #endif // L1_FF_MULTIBAND
74
75 #endif // L1_DYN_DSP_DWNLD == 1 && CODE_VERSION == SIMULATION
76
77 #elif (OP_WCP == 1) 44 #elif (OP_WCP == 1)
78
79 // WCP patch: default config is no Layer1 trace 45 // WCP patch: default config is no Layer1 trace
80 #define DEFAULT_DYN_TRACE_CONFIG 0x00000000 // default was 0x00000BB7 46 #define DEFAULT_DYN_TRACE_CONFIG 0x00000000 // default was 0x00000BB7
81 // End WCP patch 47 // End WCP patch
82
83 #else 48 #else
84 49 #define DEFAULT_DYN_TRACE_CONFIG 0x00000BB7
85 #if (L1_FF_MULTIBAND == 0)
86 #define DEFAULT_DYN_TRACE_CONFIG 0x00881BB7
87 #else
88 #define DEFAULT_DYN_TRACE_CONFIG ( 0x00881BB7 | (1<<L1_DYN_TRACE_MULTIBAND) )
89 #endif
90
91 #endif 50 #endif
92 51
93 // Possible EVENTS for L1S traces using TRACE_INFO. 52 // Possible EVENTS for L1S traces using TRACE_INFO.
94 //------------------------------------------------- 53 //-------------------------------------------------
95 54
113 #define NEW_TOA 18 72 #define NEW_TOA 18
114 #define TOA_NOT_UPDATED 19 73 #define TOA_NOT_UPDATED 19
115 #define IT_DSP_ERROR 20 74 #define IT_DSP_ERROR 20
116 #define TRACE_ADC 21 75 #define TRACE_ADC 21
117 #define PTCCH_DISABLED 22 76 #define PTCCH_DISABLED 22
118 #if (OP_L1_STANDALONE == 0) 77 #define DYN_TRACE_DEBUG 23 // Currently only work with TRACE_TYPE 4
119 #define DYN_TRACE_DEBUG 23 // Currently only work with TRACE_TYPE 4
120 #endif
121 #define DEDIC_TCH_BLOCK_STAT 24 78 #define DEDIC_TCH_BLOCK_STAT 24
122 #define DSP_TRACE_DISABLE 25 // Only works with TRACE_TYPE 1 or 4 79 #define TRACE_RATSCCH 25
123 #define DSP_TRACE_ENABLE 26 // Only works with TRACE_TYPE 1 or 4 80
124 #if (L1_AUDIO_MCU_ONOFF == 1)
125 #define L1_AUDIO_UL_ONOFF_TRACE 27
126 #define L1_AUDIO_DL_ONOFF_TRACE 28
127 #endif
128 #define SAIC_DEBUG 29
129 #define BURST_PARAM 30
130 #define TRACE_RATSCCH 31
131 #define NAVC_VALUE 32
132 #define PWMGT_FAIL_SLEEP 33
133 #define KPD_CR 34
134
135 #if(L1_PCM_EXTRACTION)
136 #define L1S_PCM_ERROR_TRACE 35
137 #endif
138 #define IQ_LOW 36
139 #if FF_TBF //verify these event numbers
140 #define NO_BLOCKS_PASSED_TO_L3 37
141 #define LACK_FREE_RLC_BUFFER 38
142 #define RLC_BLOCK_OVERRUN 39
143 #define EGPRS_IT_DSP_MISSING 40
144 #define EGPRS_IT_DSP_SPURIOUS 41
145 #define IR_TESTING 42
146 #define RLC_POLL_PARAM 43
147 #endif
148 // Wakeup Type for Power management 81 // Wakeup Type for Power management
149 //-------------------------------- 82 //--------------------------------
150 #define WAKEUP_FOR_UNDEFINED 0 83 #define WAKEUP_FOR_UNDEFINED 0
151 #define WAKEUP_FOR_L1_TASK 1 84 #define WAKEUP_FOR_L1_TASK 1
152 #define WAKEUP_FOR_OS_TASK 2 85 #define WAKEUP_FOR_OS_TASK 2
164 #define BIG_SLEEP_DUE_TO_SIM 3 // deep sleep is forbiden by SIM activitie 97 #define BIG_SLEEP_DUE_TO_SIM 3 // deep sleep is forbiden by SIM activitie
165 #define BIG_SLEEP_DUE_TO_GAUGING 4 // deep sleep is forbiden by not enought gauging 98 #define BIG_SLEEP_DUE_TO_GAUGING 4 // deep sleep is forbiden by not enought gauging
166 #define BIG_SLEEP_DUE_TO_SLEEP_MODE 5 // deep sleep is forbiden by the sleep mode enabled 99 #define BIG_SLEEP_DUE_TO_SLEEP_MODE 5 // deep sleep is forbiden by the sleep mode enabled
167 #define BIG_SLEEP_DUE_TO_DSP_TRACES 6 // deep sleep is forbiden by the DSP 100 #define BIG_SLEEP_DUE_TO_DSP_TRACES 6 // deep sleep is forbiden by the DSP
168 #define BIG_SLEEP_DUE_TO_BLUETOOTH 7 // deep sleep is forbiden by the Bluetooth module 101 #define BIG_SLEEP_DUE_TO_BLUETOOTH 7 // deep sleep is forbiden by the Bluetooth module
169 #define BIG_SLEEP_DUE_TO_CAMERA 8 // deep sleep is forbiden by the camera
170 102
171 void Trace_Packet_Transfer (UWORD8 prev_crc_error); // Previous RX blocks CRC_ERROR summary 103 void Trace_Packet_Transfer (UWORD8 prev_crc_error); // Previous RX blocks CRC_ERROR summary
172 void l1_display_buffer_trace_fct(void); 104 void l1_display_buffer_trace_fct(void);
173
174 // Possible cause for IT_DSP_ERROR
175 //-----------------------------------
176 #define IT_DSP_ERROR_CPU_OVERLOAD 0
177 #if (FF_L1_FAST_DECODING == 1)
178 #define IT_DSP_ERROR_FAST_DECODING 2
179 #define IT_DSP_ERROR_FAST_DECODING_UNEXP 3
180 #endif
181
182 105
183 //=================================================== 106 //===================================================
184 //=========== BUFFER TRACE ========================== 107 //=========== BUFFER TRACE ==========================
185 //=================================================== 108 //===================================================
186 109
422 UWORD32 l1_dyn_trace; 345 UWORD32 l1_dyn_trace;
423 UWORD32 rttl1_cell_enable[8]; 346 UWORD32 rttl1_cell_enable[8];
424 UWORD32 rttl1_event_enable; 347 UWORD32 rttl1_event_enable;
425 } T_TRACE_CONFIG; 348 } T_TRACE_CONFIG;
426 349
427 // Disable/enable DSP trace structure
428 #if (TRACE_TYPE == 1) || (TRACE_TYPE == 4)
429 #if (MELODY_E2 || L1_MP3 || L1_AAC || L1_DYN_DSP_DWNLD )
430
431 typedef struct
432 {
433 // Flag for blocking dsp trace while performing e2, mp3, aac or dynamic download activities
434 BOOL trace_flag_blocked;
435 // Nested Disable dsp trace counter
436 UWORD8 nested_disable_count;
437 // Trace level copy to be restored at the end of e2, mp3, aac or dynamic download activities
438 UWORD16 dsp_trace_level_copy;
439 } T_DSP_TRACE_HANDLER;
440
441 #endif
442 #endif // (TRACE_TYPE == 1) || (TRACE_TYPE == 4)
443
444 #if (TOA_ALGO == 2)
445 typedef struct
446 {
447 UWORD16 toa_frames_counter; // TOA Frames counter - Number of the TDMA frames (or bursts) which are used for TOA
448 // updation OR number of times l1ctl_toa() function is invoked
449 // Reset every TOA_PERIOD_LEN[l1_mode] frames
450 UWORD16 toa_accumul_counter; // Number of TDMA frames (or bursts) which are actually used for TOA tracking
451 // <= toa_frames_counter, as only if SNR>0.46875 TOA estimated by DSP is used to
452 // update the tracking algorithm
453 WORD16 toa_accumul_value; // TOA_tracking_value accumulated over 'toa_accumul_counter' frames
454 // Based on this value the shift to be applied is decided
455 }T_TRACE_TOA;
456 #endif
457
458 typedef struct
459 {
460 UWORD8 fail_step; // PWMGT Fail Step -> Periph Check OR osload/Timer/Gauging OR While puuting peripherals to sleep
461 UWORD8 fail_id; // PWMGT Fail ID -> i.e. If Periph Check is the fail step whether failure is because of UART, etc.
462 UWORD8 fail_cause; // Why the Peripheral returned failure?
463 }T_TRACE_L1_PWMGR_DEBUG;
464
465 #if (AUDIO_DEBUG == 1)
466 typedef struct
467 {
468 UWORD8 vocoder_enable_status;
469 UWORD8 ul_state;
470 UWORD8 dl_state;
471 UWORD8 ul_onoff_counter;
472 UWORD8 dl_onoff_counter;
473 }T_TRACE_AUDIO_DEBUG;
474 #endif
475
476 typedef struct
477 {
478 UWORD32 dl_count; /* Number of Downlink SACCH block */
479 UWORD32 dl_combined_good_count; /* Number of successfully decoded combined block */
480 UWORD32 dl_error_count; /* Total errors */
481 UWORD8 srr; /* SACCH Repetition Request */
482 UWORD8 sro; /* SACCH Repetition Order */
483 /* trace,debug for FER */
484 UWORD32 dl_good_norep; /* Number of correctly decoded block which is not a repetition */
485 API dl_buffer[12]; /* Downlink buffer */
486 BOOL dl_buffer_empty; /* Flag to indicate the downlink buffer is empty/full */
487 }
488 T_TRACE_REPEAT_SACCH;
489
490
491 // Debug info structure 350 // Debug info structure
492 typedef struct 351 typedef struct
493 { 352 {
494 // User IDs 353 // User IDs
495 T_RVT_USER_ID l1_trace_user_id; 354 T_RVT_USER_ID l1_trace_user_id;
507 UWORD8 facch_ul_count; 366 UWORD8 facch_ul_count;
508 UWORD8 facch_dl_fail_count; 367 UWORD8 facch_dl_fail_count;
509 UWORD8 facch_dl_fail_count_trace; 368 UWORD8 facch_dl_fail_count_trace;
510 369
511 UWORD8 sacch_d_nerr; 370 UWORD8 sacch_d_nerr;
512 #if (FF_REPEATED_SACCH == 1)
513 T_TRACE_REPEAT_SACCH repeat_sacch;
514 #endif /* (FF_REPEATED_SACCH == 1) */
515 371
516 UWORD8 rxlev_req_count; 372 UWORD8 rxlev_req_count;
517 BOOL init_trace; 373 BOOL init_trace;
518 UWORD8 abort_task; 374 UWORD8 abort_task;
519 375
534 T_PDTCH_TRACE pdtch_trace; 390 T_PDTCH_TRACE pdtch_trace;
535 #endif 391 #endif
536 392
537 #if L1_GTT 393 #if L1_GTT
538 T_RVT_USER_ID gtt_trace_user_id; 394 T_RVT_USER_ID gtt_trace_user_id;
539 #endif
540
541 #if (L1_MIDI == 1)
542 T_RVT_USER_ID midi_trace_user_id;
543 #endif 395 #endif
544 396
545 #if (D_ERROR_STATUS_TRACE_ENABLE) 397 #if (D_ERROR_STATUS_TRACE_ENABLE)
546 // define a mask array for handling of the d_error_status field 398 // define a mask array for handling of the d_error_status field
547 UWORD16 d_error_status_masks[2]; 399 UWORD16 d_error_status_masks[2];
564 UWORD8 l1s_trace_buf[L1S_RTT_BUF_LENGTH]; 416 UWORD8 l1s_trace_buf[L1S_RTT_BUF_LENGTH];
565 #endif 417 #endif
566 UWORD32 task_bitmap[8]; 418 UWORD32 task_bitmap[8];
567 UWORD32 mem_task_bitmap[8]; 419 UWORD32 mem_task_bitmap[8];
568 420
569 #if (TOA_ALGO == 2)
570 T_TRACE_TOA toa_trace_var;
571 #endif
572 T_TRACE_L1_PWMGR_DEBUG pwmgt_trace_var;
573 #if(L1_SAIC != 0)
574 UWORD8 prev_saic_flag_val;
575 UWORD8 prev_swh_flag_val;
576 #endif
577 // Dynamic trace 421 // Dynamic trace
578 T_TRACE_CONFIG config[2]; 422 T_TRACE_CONFIG config[2];
579 T_TRACE_CONFIG *current_config; 423 T_TRACE_CONFIG *current_config;
580 T_TRACE_CONFIG *pending_config; 424 T_TRACE_CONFIG *pending_config;
581
582 #if (TRACE_TYPE == 1) || (TRACE_TYPE == 4)
583 #if (MELODY_E2 || L1_MP3 || L1_DYN_DSP_DWNLD)
584 // DSP Trace Handler global variables
585 T_DSP_TRACE_HANDLER dsptrace_handler_globals;
586 #endif
587 #endif // (TRACE_TYPE == 1) || (TRACE_TYPE == 4)
588 #if (AUDIO_DEBUG == 1)
589 T_TRACE_AUDIO_DEBUG audio_debug_var;
590 #endif
591 #if (L1_RF_KBD_FIX == 1)
592 UWORD16 prev_correction_ratio;
593 #endif
594 #if (FF_REPEATED_DL_FACCH == 1 )
595 UWORD8 facch_dl_combined_good_count; /* Number of successfully decoded combined block */
596 UWORD8 facch_dl_repetition_block_count; /*Number of repetition block*/
597 UWORD8 facch_dl_count_all; /* Number of DL FACCH block*/
598 UWORD8 facch_dl_good_block_reported; /* Number of correctly decoded block which is not a repetition */
599 #endif
600 } 425 }
601 T_TRACE_INFO_STRUCT; 426 T_TRACE_INFO_STRUCT;
602 427
603 extern T_TRACE_INFO_STRUCT trace_info; 428 extern T_TRACE_INFO_STRUCT trace_info;
604 429
605 430
606 /***********************/ 431 /***********************/
607 /* Function prototypes */ 432 /* Function prototypes */
608 /***********************/ 433 /***********************/
609 434
610 void l1_init_trace_var (void); 435 void l1_trace_init ();
611 void l1_trace_init (void);
612 void Trace_L1s_Abort (UWORD8 task); 436 void Trace_L1s_Abort (UWORD8 task);
613 void Trace_MCU_DSP_Com_Mismatch (UWORD8 task); 437 void Trace_MCU_DSP_Com_Mismatch (UWORD8 task);
614 void Trace_PM_Equal_0 (UWORD32 pm, UWORD8 task); 438 void Trace_PM_Equal_0 (UWORD32 pm, UWORD8 task);
615 #if FF_TBF
616 void Trace_rlc_ul_param (UWORD8 assignment_id,
617 UWORD32 fn,
618 UWORD8 tx_no,
619 UWORD8 ta,
620 BOOL fix_alloc_exhaust,
621 UWORD32 cs_type);
622 void Trace_rlc_dl_param (UWORD8 assignment_id,
623 UWORD32 fn,
624 UWORD8 rx_no,
625 UWORD8 rlc_blocks_sent,
626 UWORD8 last_poll_response,
627 UWORD32 status1,
628 UWORD32 status2);
629 void Trace_rlc_poll_param (BOOL poll,
630 UWORD32 fn,
631 UWORD8 poll_ts,
632 UWORD8 tx_alloc,
633 UWORD8 tx_data,
634 UWORD8 rx_alloc,
635 UWORD8 last_poll_resp,
636 UWORD8 ack_type);
637 #else
638 void Trace_rlc_dl_param (UWORD8 assignment_id,
639 UWORD32 fn,
640 UWORD32 d_rlcmac_rx_no_gprs,
641 UWORD8 rx_no,
642 UWORD8 rlc_blocks_sent,
643 UWORD8 last_poll_response);
644 void Trace_rlc_ul_param (UWORD8 assignment_id, 439 void Trace_rlc_ul_param (UWORD8 assignment_id,
645 UWORD8 tx_no, 440 UWORD8 tx_no,
646 UWORD32 fn, 441 UWORD32 fn,
647 UWORD8 ta, 442 UWORD8 ta,
648 UWORD32 a_pu_gprs, 443 UWORD32 a_pu_gprs,
649 UWORD32 a_du_gprs, 444 UWORD32 a_du_gprs,
650 BOOL fix_alloc_exhaust); 445 BOOL fix_alloc_exhaust);
651 #endif 446 void Trace_rlc_dl_param (UWORD8 assignment_id,
652 void Trace_uplink_no_TA (void); 447 UWORD32 fn,
448 UWORD32 d_rlcmac_rx_no_gprs,
449 UWORD8 rx_no,
450 UWORD8 rlc_blocks_sent,
451 UWORD8 last_poll_response);
452 void Trace_uplink_no_TA ();
653 void Trace_condensed_pdtch (UWORD8 rx_allocation, UWORD8 tx_allocation); 453 void Trace_condensed_pdtch (UWORD8 rx_allocation, UWORD8 tx_allocation);
654 void Trace_dl_ptcch (UWORD8 ordered_ta, 454 void Trace_dl_ptcch (UWORD8 ordered_ta,
655 UWORD8 crc, 455 UWORD8 crc,
656 UWORD8 ta_index, 456 UWORD8 ta_index,
657 UWORD8 ts, 457 UWORD8 ts,
660 UWORD16 elt3, 460 UWORD16 elt3,
661 UWORD16 elt4, 461 UWORD16 elt4,
662 UWORD16 elt5, 462 UWORD16 elt5,
663 UWORD16 elt6, 463 UWORD16 elt6,
664 UWORD16 elt7, 464 UWORD16 elt7,
665 UWORD16 elt8); 465 UWORD16 elt8
666 void Trace_d_error_status (void); 466 );
667 void Trace_dsp_debug (void); 467
468 void Trace_d_error_status ();
469 void Trace_dsp_debug ();
668 #if (AMR == 1) 470 #if (AMR == 1)
669 void Trace_dsp_amr_debug (void); 471 void Trace_dsp_amr_debug (void);
670 #endif 472 #endif
671 void Trace_params (UWORD8 debug_code, 473 void Trace_params (UWORD8 debug_code,
672 UWORD32 param0, 474 UWORD32 param0,
674 UWORD32 param2, 476 UWORD32 param2,
675 UWORD32 param3, 477 UWORD32 param3,
676 UWORD32 param4, 478 UWORD32 param4,
677 UWORD32 param5, 479 UWORD32 param5,
678 UWORD32 param6); 480 UWORD32 param6);
679 void Trace_L1S_CPU_load (void); 481 void Trace_L1S_CPU_load ();
680 void l1_dsp_cpu_load_read (void); 482 void Trace_dyn_trace_change ();
681 void Trace_dyn_trace_change (void); 483
682 #if (AMR == 1) 484 #if (AMR == 1)
683 void l1_trace_ratscch (UWORD16 fn, UWORD16 amr_change_bitmap); 485 void l1_trace_ratscch (UWORD16 fn, UWORD16 amr_change_bitmap);
684 #endif 486 #endif
487
685 void l1_trace_sleep (UWORD32 start_fn, 488 void l1_trace_sleep (UWORD32 start_fn,
686 UWORD32 end_fn, 489 UWORD32 end_fn,
687 UWORD8 type_sleep, 490 UWORD8 type_sleep,
688 UWORD8 wakeup_type, 491 UWORD8 wakeup_type,
689 UWORD8 big_sleep_type, 492 UWORD8 big_sleep_type);
690 UWORD16 int_id);
691 void l1_trace_fail_sleep (UWORD8 pwmgr_fail_step,
692 UWORD8 pwmgr_fail_id,
693 UWORD8 pwmgr_fail_cause);
694 void l1_trace_sleep_intram (UWORD32 start_fn,
695 UWORD32 end_fn,
696 UWORD8 type_sleep,
697 UWORD8 wakeup_type,
698 UWORD8 big_sleep_type,
699 UWORD16 int_id);
700 void l1_trace_gauging_reset (void); 493 void l1_trace_gauging_reset (void);
701 void l1_trace_gauging (void); 494 void l1_trace_gauging (void);
702 void l1_trace_gauging_intram (void);
703 #if (L1_SAIC != 0)
704 void l1_trace_saic (UWORD32 SWH_flag, UWORD32 SAIC_flag);
705 #endif
706
707 #if (L1_NAVC_TRACE == 1)
708 void l1_trace_navc (UWORD32 status, UWORD32 energy_level);
709 #endif
710 void l1_trace_burst_param (UWORD32 angle,
711 UWORD32 snr,
712 UWORD32 afc,
713 UWORD32 task,
714 UWORD32 pm,
715 UWORD32 toa_val,
716 UWORD32 IL_for_rxlev);
717 void l1_log_burst_param (UWORD32 angle,
718 UWORD32 snr,
719 UWORD32 afc,
720 UWORD32 task,
721 UWORD32 pm,
722 UWORD32 toa_val,
723 UWORD32 IL_for_rxlev);
724 void l1_trace_new_toa (void); 495 void l1_trace_new_toa (void);
725 void l1_trace_new_toa_intram (void);
726 void l1_trace_toa_not_updated (void); 496 void l1_trace_toa_not_updated (void);
727 void l1_trace_IT_DSP_error (UWORD8 cause); 497 void l1_trace_IT_DSP_error (void);
728 void l1_trace_ADC (UWORD8 type); 498 void l1_trace_ADC (UWORD8 type);
729 void l1_trace_ADC_intram (UWORD8 type);
730 void l1_check_com_mismatch (UWORD8 task); 499 void l1_check_com_mismatch (UWORD8 task);
731 void l1_check_pm_error (UWORD32 pm,UWORD8 task); 500 void l1_check_pm_error (UWORD32 pm,UWORD8 task);
732 void Trace_PM_Equal_0_balance (void); 501 void Trace_PM_Equal_0_balance (void);
733 void l1_trace_ptcch_disable (void); 502 void l1_trace_ptcch_disable (void);
734 void trace_fct (UWORD8 fct_id, UWORD32 radio_freq); 503 void trace_fct (UWORD8 fct_id, WORD32 radio_freq);
735 void l1_intram_put_trace (CHAR *msg);
736 void l1_trace_IT_DSP_error_intram(void);
737 void Trace_d_error_status_intram (void);
738 void l1s_trace_mftab (void);
739 void l1s_trace_mftab (void);
740
741 #if (TRACE_TYPE == 1) || (TRACE_TYPE == 4)
742 #if (MELODY_E2 || L1_MP3 || L1_DYN_DSP_DWNLD)
743 void l1_disable_dsp_trace (void);
744 void l1_enable_dsp_trace (void);
745 void l1_set_dsp_trace_mask (UWORD16 mask);
746 UWORD16 l1_get_dsp_trace_mask (void);
747 #endif
748 #endif // (TRACE_TYPE == 1) || (TRACE_TYPE == 4)
749
750 #if (L1_AUDIO_MCU_ONOFF == 1)
751 void l1_trace_ul_audio_onoff(UWORD8 ul_state);
752 void l1_trace_dl_audio_onoff(UWORD8 dl_state);
753 #endif
754 #if FF_TBF
755 // void l1_trace_egprs (UWORD8 type);
756
757 //For burst power trace.AGC_TRACE
758 void l1_trace_agc (UWORD8 burst_id, UWORD8 agc);
759 void l1_trace_burst (UWORD8 *time_slot, UWORD8 burst_id);
760 void burst_trace_message(void);
761 #endif
762 504
763 /****************/ 505 /****************/
764 /* Trace macros */ 506 /* Trace macros */
765 /****************/ 507 /****************/
766 508
794 #define L1_DYN_TRACE_L1S_CPU_LOAD 8 //NAME/ L1S CPU load peaks 536 #define L1_DYN_TRACE_L1S_CPU_LOAD 8 //NAME/ L1S CPU load peaks
795 #define L1_DYN_TRACE_ULPD 9 //NAME/ ULPD 537 #define L1_DYN_TRACE_ULPD 9 //NAME/ ULPD
796 #define L1_DYN_TRACE_FULL_LIST_REPORT 10 //NAME/ Full list report 538 #define L1_DYN_TRACE_FULL_LIST_REPORT 10 //NAME/ Full list report
797 #define L1_DYN_TRACE_GTT 11 //NAME/ GTT trace 539 #define L1_DYN_TRACE_GTT 11 //NAME/ GTT trace
798 #define L1_DYN_TRACE_DSP_AMR_DEBUG 12 //NAME/ DSP AMR debug trace 540 #define L1_DYN_TRACE_DSP_AMR_DEBUG 12 //NAME/ DSP AMR debug trace
799 #define L1_DYN_TRACE_MIDI 13 //NAME/ MIDI trace
800 #define L1_DYN_TRACE_MP3 14 //NAME/ MP3 trace
801 #define L1_DYN_TRACE_GAUGING 15 //NAME/ Gauging parameters
802 #if(L1_DYN_DSP_DWNLD == 1) 541 #if(L1_DYN_DSP_DWNLD == 1)
803 #define L1_DYN_TRACE_DYN_DWNLD 16 //NAME/ DYN DWNLD trace 542 #define L1_DYN_TRACE_DYN_DWNLD 13 //NAME/ DYN DWNLD trace
804 #endif // L1_DYN_DSP_DWNLD == 1 543 #endif // L1_DYN_DSP_DWNLD == 1
805 544 #define L1_DYN_TRACE_GAUGING 14 //NAME/ Gauging parameters
806 #if (L1_SAIC != 0)
807 #define L1_DYN_TRACE_SAIC_DEBUG 17 //NAME/ SAIC trace
808 #endif
809 #define L1_DYN_TRACE_BURST_PARAM 18 //NAME/ Burst Param
810
811 #if (L1_AUDIO_MCU_ONOFF == 1)
812 #define L1_DYN_TRACE_AUDIO_ONOFF 19
813 #endif
814 #if FF_TBF
815 #define L1_DYN_TRACE_POLL_PARAM 29 //NAME/ Poll parameters
816 #endif
817 // The Below flag is used to enable/disable the API dump over UART
818 #define L1_DYN_TRACE_API_DUMP 20 //NAME/ API dump
819
820 #define L1_DSP_TRACE_FULL_DUMP 21 // flag for enabling the full trace buffer of DSP on PM error
821 #if (L1_AAC == 1)
822 #define L1_DYN_TRACE_AAC 22 //NAME/ AAC trace
823 #endif
824 #define L1_DYN_TRACE_PWMGT_FAIL_DEBUG 23 // NAME Power Management Sleep fail Trace
825
826 #if(L1_RF_KBD_FIX == 1)
827 #define L1_DYN_TRACE_RF_KBD 24 //Make RF KPD trace dynamic
828 #endif
829
830 #define L1_DYN_TRACE_DSP_CPU_LOAD 25 //NAME/ DSP CPU load trace
831
832 #if (L1_FF_MULTIBAND == 1)
833 #define L1_DYN_TRACE_MULTIBAND 26 /*MULTIBAND DEBUG trace*/
834 #endif
835
836
837 //END_TRACE_CONF/ 545 //END_TRACE_CONF/
838 546
839 #define L1_DYN_TRACE_DL_PDTCH_CRC 6 // DL PDTCH blocks CRC, only used if L1_BINARY_TRACE == 0 547 #define L1_DYN_TRACE_DL_PDTCH_CRC 6 // DL PDTCH blocks CRC, only used if L1_BINARY_TRACE == 0
840 548
841 // L1 RTT event definitions 549 // L1 RTT event definitions
1005 #define CST_L1DMACRO_SYNCHRO 121 //NAME/ l1dmacro_synchro 713 #define CST_L1DMACRO_SYNCHRO 121 //NAME/ l1dmacro_synchro
1006 #define CST_TX_TCH_DATA 122 //NAME/ tx_tch_data() 714 #define CST_TX_TCH_DATA 122 //NAME/ tx_tch_data()
1007 #define CST_DLL_READ_DCCH 123 //NAME/ dll_read_dcch() 715 #define CST_DLL_READ_DCCH 123 //NAME/ dll_read_dcch()
1008 #define CST_DLL_READ_SACCH 124 //NAME/ dll_read_sacch() 716 #define CST_DLL_READ_SACCH 124 //NAME/ dll_read_sacch()
1009 #define CST_L1S_ADJUST_TIME 125 //NAME/ Time adjustment 717 #define CST_L1S_ADJUST_TIME 125 //NAME/ Time adjustment
1010 #if ((REL99 == 1) && (FF_BHO == 1))
1011 #define CST_L1S_CTRL_FBSB 128 //NAME/ l1s_ctrl_fbsb()
1012 #endif
1013 //END_TABLE/ 718 //END_TABLE/
1014 719
1015 /***********************************************************/ 720 /***********************************************************/
1016 /* Classic Trace structures */ 721 /* Classic Trace structures */
1017 /***********************************************************/ 722 /***********************************************************/
1444 UWORD16 rxqual_full_nbr_bits; 1149 UWORD16 rxqual_full_nbr_bits;
1445 UWORD16 rxqual_sub_acc_errors; 1150 UWORD16 rxqual_sub_acc_errors;
1446 UWORD16 rxqual_sub_nbr_bits; 1151 UWORD16 rxqual_sub_nbr_bits;
1447 WORD16 rxlev_sub_acc; 1152 WORD16 rxlev_sub_acc;
1448 WORD16 rxlev_full_acc; 1153 WORD16 rxlev_full_acc;
1449 #if REL99
1450 #if FF_EMR
1451 WORD16 rxlev_val_acc;
1452 UWORD8 rxlev_val_nbr_meas;
1453 UWORD32 mean_bep_block_acc;
1454 UWORD16 cv_bep_block_acc;
1455 UWORD8 mean_bep_block_num;
1456 UWORD8 cv_bep_block_num;
1457 UWORD8 nbr_rcvd_blocks;
1458 #endif
1459 #endif //L1_R99
1460 UWORD16 bcch_freq[6]; 1154 UWORD16 bcch_freq[6];
1461 WORD16 rxlev_acc[6]; 1155 WORD16 rxlev_acc[6];
1462 BOOL meas_valid; 1156 BOOL meas_valid;
1463 UWORD8 txpwr_used; 1157 UWORD8 txpwr_used;
1464 UWORD8 timing_advance; 1158 UWORD8 timing_advance;
4586 typedef struct 4280 typedef struct
4587 { 4281 {
4588 UWORD32 header; 4282 UWORD32 header;
4589 } 4283 }
4590 T_TR_MMI_VM_AMR_RECORD_STOP_CON; 4284 T_TR_MMI_VM_AMR_RECORD_STOP_CON;
4591 /***********************************************************************************************************/
4592 /* Begin header
4593 //TYPE/ CLASSIC
4594 //NAME/ MMI_VM_AMR_PAUSE_REQ
4595 //FULL/
4596 " | | | | | |"
4597 "#@Fdl7# |---->| | | VM_AMR_PAUSE_REQ | #"
4598 //COND/
4599 "#@Fdl7# VM_AMR_PAUSE_REQ"
4600 End header */
4601 //ID/
4602 #define TRL1_MMI_VM_AMR_PAUSE_REQ 227
4603 //STRUCT/
4604 typedef struct
4605 {
4606 UWORD32 header;
4607 //--------------------------------------------------
4608
4609 }
4610 T_TR_MMI_VM_AMR_PAUSE_REQ;
4611 /***********************************************************************************************************/
4612 /* Begin header
4613 //TYPE/ CLASSIC
4614 //NAME/ MMI_VM_AMR_RESUME_REQ
4615 //FULL/
4616 " | | | | | |"
4617 "#@Fdl7# |---->| | | VM_AMR_RESUME_REQ | "
4618 //COND/
4619 "#@Fdl7# VM_AMR_RESUME_REQ"
4620 End header */
4621 //ID/
4622 #define TRL1_MMI_VM_AMR_RESUME_REQ 228
4623 //STRUCT/
4624 typedef struct
4625 {
4626 UWORD32 header;
4627 //--------------------------------------------------
4628 // UWORD8 session_id;
4629 }
4630 T_TR_MMI_VM_AMR_RESUME_REQ;
4631 /***********************************************************************************************************/
4632 /* Begin header
4633 //TYPE/ CLASSIC
4634 //NAME/ MMI_VM_AMR_PAUSE_CON
4635 //FULL/
4636 " | | | | | |"
4637 "#@Fdl7# |---->| | | VM_AMR_PAUSE_CON |"
4638 //COND/
4639 "#@Fdl7# VM_AMR_PAUSE_CON"
4640 End header */
4641 //ID/
4642 #define TRL1_MMI_VM_AMR_PAUSE_CON 229
4643 //STRUCT/
4644 typedef struct
4645 {
4646 UWORD32 header;
4647 //--------------------------------------------------
4648 }
4649 T_TR_MMI_VM_AMR_PAUSE_CON;
4650 /***********************************************************************************************************/
4651 /* Begin header
4652 //TYPE/ CLASSIC
4653 //NAME/ MMI_VM_AMR_RESUME_CON
4654 //FULL/
4655 " | | | | | |"
4656 "#@Fdl7# |---->| | | VM_AMR_RESUME_CON |"
4657 //COND/
4658 "#@Fdl7# VM_AMR_RESUME_CON"
4659 End header */
4660 //ID/
4661 #define TRL1_MMI_VM_AMR_RESUME_CON 230
4662 //STRUCT/
4663 typedef struct
4664 {
4665 UWORD32 header;
4666 //--------------------------------------------------
4667 }
4668 T_TR_MMI_VM_AMR_RESUME_CON;
4669
4670 4285
4671 /***********************************************************************************************************/ 4286 /***********************************************************************************************************/
4672 /* Begin header 4287 /* Begin header
4673 //TYPE/ CLASSIC 4288 //TYPE/ CLASSIC
4674 //NAME/ MMI_SR_ENROLL_START_REQ 4289 //NAME/ MMI_SR_ENROLL_START_REQ
5979 typedef struct 5594 typedef struct
5980 { 5595 {
5981 UWORD32 header; 5596 UWORD32 header;
5982 //-------------------------------------------------- 5597 //--------------------------------------------------
5983 WORD16 toa_shift; 5598 WORD16 toa_shift;
5984 #if (TOA_ALGO == 2)
5985 UWORD16 toa_frames_counter;
5986 UWORD16 toa_accumul_counter;
5987 UWORD16 toa_accumul_value;
5988 #endif
5989 } 5599 }
5990 T_TR_NEW_TOA; 5600 T_TR_NEW_TOA;
5991 5601
5992 /***********************************************************************************************************/ 5602 /***********************************************************************************************************/
5993 /* Begin header 5603 /* Begin header
6057 #define BIG_SLEEP_DUE_TO_SIM 3 // deep sleep is forbiden by SIM activitie 5667 #define BIG_SLEEP_DUE_TO_SIM 3 // deep sleep is forbiden by SIM activitie
6058 #define BIG_SLEEP_DUE_TO_GAUGING 4 // deep sleep is forbiden by not enought gauging 5668 #define BIG_SLEEP_DUE_TO_GAUGING 4 // deep sleep is forbiden by not enought gauging
6059 #define BIG_SLEEP_DUE_TO_SLEEP_MODE 5 // deep sleep is forbiden by the sleep mode enabled 5669 #define BIG_SLEEP_DUE_TO_SLEEP_MODE 5 // deep sleep is forbiden by the sleep mode enabled
6060 #define BIG_SLEEP_DUE_TO_DSP_TRACES 6 // deep sleep is forbiden by the DSP 5670 #define BIG_SLEEP_DUE_TO_DSP_TRACES 6 // deep sleep is forbiden by the DSP
6061 #define BIG_SLEEP_DUE_TO_BLUETOOTH 7 // deep sleep is forbiden by the Bluetooth module 5671 #define BIG_SLEEP_DUE_TO_BLUETOOTH 7 // deep sleep is forbiden by the Bluetooth module
6062 #define BIG_SLEEP_DUE_TO_CAMERA 8 // deep sleep is forbiden by the camera
6063 5672
6064 /***********************************************************************************************************/ 5673 /***********************************************************************************************************/
6065 /* Begin header 5674 /* Begin header
6066 //TYPE/ CLASSIC 5675 //TYPE/ CLASSIC
6067 //NAME/ Gauging 5676 //NAME/ Gauging
6465 { 6074 {
6466 UWORD32 header; 6075 UWORD32 header;
6467 } 6076 }
6468 T_TR_L1C_STOP_DEDICATED_DONE; 6077 T_TR_L1C_STOP_DEDICATED_DONE;
6469 6078
6470 #if (L1_VOCODER_IF_CHANGE == 1)
6471 /***********************************************************************************************************/
6472 /* Begin header
6473 //TYPE/ CLASSIC
6474 //NAME/ MMI_TCH_VOCODER_CFG_REQ
6475 //FULL/
6476 " | | | | | |"
6477 "#@Fdl7# |---->| | | MMI_TCH_VOCODER_CFG_REQ |"
6478 //COND/
6479 "#@Fdl7# MMI_TCH_VOCODER_CFG_REQ"
6480 End header */
6481 //ID/
6482 #define TRL1_MMI_TCH_VOCODER_CFG_REQ 220
6483 //STRUCT/
6484 typedef struct
6485 {
6486 UWORD32 header;
6487 }
6488 T_TR_MMI_TCH_VOCODER_CFG_REQ;
6489
6490 /***********************************************************************************************************/
6491 /* Begin header
6492 //TYPE/ CLASSIC
6493 //NAME/ MMI_TCH_VOCODER_CFG_CON
6494 //FULL/
6495 " | | | | | |"
6496 "#@Fdl7# | |<-| | MMI_TCH_VOCODER_CFG_CON |"
6497 //COND/
6498 "#@Fdl7# MMI_TCH_VOCODER_CFG_CON"
6499 End header */
6500 //ID/
6501 #define TRL1_MMI_TCH_VOCODER_CFG_CON 221
6502 //STRUCT/
6503 typedef struct
6504 {
6505 UWORD32 header;
6506 }
6507 T_TR_MMI_TCH_VOCODER_CFG_CON;
6508
6509 /***********************************************************************************************************/
6510 /* Begin header
6511 //TYPE/ CLASSIC
6512 //NAME/ L1_VOCODER_CFG_ENABLE_CON
6513 //FULL/
6514 " | | | | | |"
6515 "#@Fdl7# | | |<-| | L1_VOCODER_CFG_ENABLE_CON |"
6516 //COND/
6517 "#@Fdl7# L1_VOCODER_CFG_ENABLE_CON"
6518 End header */
6519 //ID/
6520 #define TRL1_L1_VOCODER_CFG_ENABLE_CON 222
6521 //STRUCT/
6522 typedef struct
6523 {
6524 UWORD32 header;
6525 }
6526 T_TR_L1_VOCODER_CFG_ENABLE_CON;
6527
6528 /***********************************************************************************************************/
6529 /* Begin header
6530 //TYPE/ CLASSIC
6531 //NAME/ L1_VOCODER_CFG_DISABLE_CON
6532 //FULL/
6533 " | | | | | |"
6534 "#@Fdl7# | | |<-| | L1_VOCODER_CFG_DISABLE_CON |"
6535 //COND/
6536 "#@Fdl7# L1_VOCODER_CFG_DISABLE_CON"
6537 End header */
6538 //ID/
6539 #define TRL1_L1_VOCODER_CFG_DISABLE_CON 223
6540 //STRUCT/
6541 typedef struct
6542 {
6543 UWORD32 header;
6544 }
6545 T_TR_L1_VOCODER_CFG_DISABLE_CON;
6546 #endif
6547
6548 /***********************************************************************************************************/
6549 /* Begin header
6550 //TYPE/ CLASSIC
6551 //NAME/ SAIC Debug
6552 //FULL/
6553 " | | | | | |----------------------------------------------------------------------------------------------------------------"
6554 "#@Fdl7# | | | O | SAIC | SWH_flag: #@1d#"
6555 //COND/
6556 "#@Fdl7# New TOA"
6557 End header */
6558 //ID/
6559 #define TRL1_SAIC_DEBUG 224
6560 //STRUCT/
6561 typedef struct
6562 {
6563 UWORD32 header;
6564 //--------------------------------------------------
6565 UWORD32 SWH_flag;
6566 UWORD32 SAIC_flag;
6567 }
6568 T_TR_SAIC_DEBUG;
6569
6570
6571 #define TRL1_BURST_PARAM 225
6572 //STRUCT/
6573 typedef struct
6574 {
6575 UWORD32 header;
6576 //--------------------------------------------------
6577 WORD16 angle;
6578 UWORD16 snr;
6579 WORD16 afc;
6580 UWORD16 pm;
6581 UWORD16 toa;
6582 UWORD8 task;
6583 UWORD8 input_level;
6584 }
6585 T_TR_BURST_PARAM;
6586
6587 //NAVC
6588
6589 #define TRL1_L1_NAVC 226
6590 typedef struct
6591 {
6592 UWORD32 status;
6593 UWORD32 energy_level;
6594 }
6595 T_TR_NAVC_PARAM;
6596 6079
6597 /***********************************************************************************************************/ 6080 /***********************************************************************************************************/
6598 /* L1 RTT */ 6081 /* L1 RTT */
6599 /***********************************************************************************************************/ 6082 /***********************************************************************************************************/
6600 6083
7196 T_TR_MMI_VM_AMR_PLAY_STOP_CON cell212; 6679 T_TR_MMI_VM_AMR_PLAY_STOP_CON cell212;
7197 T_TR_MMI_VM_AMR_RECORD_START_REQ cell213; 6680 T_TR_MMI_VM_AMR_RECORD_START_REQ cell213;
7198 T_TR_MMI_VM_AMR_RECORD_START_CON cell214; 6681 T_TR_MMI_VM_AMR_RECORD_START_CON cell214;
7199 T_TR_MMI_VM_AMR_RECORD_STOP_REQ cell215; 6682 T_TR_MMI_VM_AMR_RECORD_STOP_REQ cell215;
7200 T_TR_MMI_VM_AMR_RECORD_STOP_CON cell216; 6683 T_TR_MMI_VM_AMR_RECORD_STOP_CON cell216;
7201 T_TR_MMI_VM_AMR_PAUSE_REQ cell227;
7202 T_TR_MMI_VM_AMR_RESUME_REQ cell228;
7203 T_TR_MMI_VM_AMR_PAUSE_CON cell229;
7204 T_TR_MMI_VM_AMR_RESUME_CON cell230;
7205 T_TR_MPHC_NCELL_LIST_SYNC_REQ cell217; 6684 T_TR_MPHC_NCELL_LIST_SYNC_REQ cell217;
7206 T_TR_MPHC_STOP_DEDICATED_CON cell218; 6685 T_TR_MPHC_STOP_DEDICATED_CON cell218;
7207 T_TR_L1C_STOP_DEDICATED_DONE cell219; 6686 T_TR_L1C_STOP_DEDICATED_DONE cell219;
7208 #if (L1_VOCODER_IF_CHANGE == 1)
7209 T_TR_MMI_TCH_VOCODER_CFG_REQ cell220;
7210 T_TR_MMI_TCH_VOCODER_CFG_CON cell221;
7211 T_TR_L1_VOCODER_CFG_ENABLE_CON cell222;
7212 T_TR_L1_VOCODER_CFG_DISABLE_CON cell223;
7213 #endif
7214 T_TR_SAIC_DEBUG cell224;
7215 T_TR_BURST_PARAM cell225;
7216 6687
7217 // RTT cells 6688 // RTT cells
7218 T_RTTL1_FN rttcell1; 6689 T_RTTL1_FN rttcell1;
7219 T_RTTL1_DL_BURST rttcell2; 6690 T_RTTL1_DL_BURST rttcell2;
7220 T_RTTL1_UL_NB rttcell3; 6691 T_RTTL1_UL_NB rttcell3;
7237 /************************************/ 6708 /************************************/
7238 /* RTT macro definitions */ 6709 /* RTT macro definitions */
7239 /************************************/ 6710 /************************************/
7240 #include "l1_rtt_macro.h" 6711 #include "l1_rtt_macro.h"
7241 6712
7242 #if (L1_FF_MULTIBAND == 1)
7243 #if ( (TRACE_TYPE == 1) || (TRACE_TYPE==4) )
7244 #define L1_MULTIBAND_TRACE_PARAMS l1_multiband_trace_params
7245 #elif (TRACE_TYPE == 5)
7246 #define L1_MULTIBAND_TRACE_PARAMS l1_multiband_trace_params_simu
7247 #endif 6713 #endif
7248 #define MULTIBAND_PHYSICAL_BAND_TRACE_ID 0
7249 #define MULTIBAND_ERROR_TRACE_ID 1
7250 #endif /*if (L1_FF_MULTIBAND == 1)*/
7251
7252
7253 #endif