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comparison L1/tpudrv/tpudrv.c @ 16:2dcce7bda202

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tpudrv.c: initial import of reconstructed TCS211 version
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 10 Jun 2016 06:35:31 +0000
parents 75a11d740a02
children e8c05cfca8aa
comparison
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15:002303327705 16:2dcce7bda202
13 * 13 *
14 * Copyright (c) Texas Instruments 1996 14 * Copyright (c) Texas Instruments 1996
15 * 15 *
16 */ 16 */
17 17
18 #include "config.h" 18 #include "l1_macro.h"
19 #include "iq.h"
19 #include "l1_confg.h" 20 #include "l1_confg.h"
20 #include "l1_macro.h"
21 #include "../../bsp/iq.h"
22 #include "l1_const.h" 21 #include "l1_const.h"
23 #include "l1_types.h" 22 #include "l1_types.h"
24 23
25 #if (AUDIO_TASK == 1) 24 #if (AUDIO_TASK == 1)
26 #include "l1audio_const.h" 25 #include "l1audio_const.h"
55 #include "l1aac_defty.h" 54 #include "l1aac_defty.h"
56 #endif 55 #endif
57 #include "l1_defty.h" 56 #include "l1_defty.h"
58 #include "tpudrv.h" 57 #include "tpudrv.h"
59 #include "sys_types.h" 58 #include "sys_types.h"
60 #include "../../bsp/clkm.h" 59 #include "clkm.h"
61 #include "l1_time.h" 60 #include "l1_time.h"
62 #include "l1_varex.h" 61 #include "l1_varex.h"
63 #include "l1_trace.h" 62 #include "l1_trace.h"
64 63
65 #if (L1_MADC_ON == 1) 64 #if (L1_MADC_ON == 1)
246 * ((volatile SYS_UWORD16 *) TPU_INT_CTRL) |= TPU_INT_ITF_M | TPU_INT_ITP_M | TPU_INT_ITD_M; 245 * ((volatile SYS_UWORD16 *) TPU_INT_CTRL) |= TPU_INT_ITF_M | TPU_INT_ITP_M | TPU_INT_ITD_M;
247 246
248 } 247 }
249 248
250 249
251
252
253
254 /* 250 /*
255 * TP_Program 251 * TP_Program
256 * 252 *
257 * Write a null-terminated scenario into TPU memory at a given start address 253 * Write a null-terminated scenario into TPU memory at a given start address
258 * (Do not write terminating 0) 254 * (Do not write terminating 0)
259 * 255 *
260 */ 256 */
261 void *TP_Program(const SYS_UWORD16 *src) 257 void TP_Program(const SYS_UWORD16 *src)
262 { 258 {
263 /* Write TPU instructions until SLEEP */ 259 /* Write TPU instructions until SLEEP */
264 while (*src) 260 while (*src)
265 { 261 {
266 *TP_Ptr++ = *src++; 262 *TP_Ptr++ = *src++;
267 } 263 }
268 #if 1 //(TOOL_CHOICE == 3) // 2.54 Migration 264 }
269 return((void *)NULL);
270 #endif // TOOL_CHOICE == 3
271 // return((void *)NULL);//ompas00090550
272
273 }
274
275 265
276 266
277 void TP_Reset(SYS_UWORD16 on) 267 void TP_Reset(SYS_UWORD16 on)
278 { 268 {
279 if (on) { 269 if (on) {
310 wait_ARM_cycles(convert_nanosec_to_cycles(3000)); // wait 3us 300 wait_ARM_cycles(convert_nanosec_to_cycles(3000)); // wait 3us
311 } 301 }
312 } 302 }
313 303
314 304
305 #if 0 /* FreeCalypso: function not present in TCS211 */
315 /*-----------------------------------------------------------------------*/ 306 /*-----------------------------------------------------------------------*/
316 /* Function name: TPU_wait_idle */ 307 /* Function name: TPU_wait_idle */
317 /*-----------------------------------------------------------------------*/ 308 /*-----------------------------------------------------------------------*/
318 /* */ 309 /* */
319 /* Parameters: None */ 310 /* Parameters: None */
329 while( ((*(volatile SYS_UWORD16 *) (TPU_CTRL)) & TPU_CTRL_TPU_IDLE) == TPU_CTRL_TPU_IDLE) 320 while( ((*(volatile SYS_UWORD16 *) (TPU_CTRL)) & TPU_CTRL_TPU_IDLE) == TPU_CTRL_TPU_IDLE)
330 { 321 {
331 wait_ARM_cycles(convert_nanosec_to_cycles(3000)); 322 wait_ARM_cycles(convert_nanosec_to_cycles(3000));
332 } 323 }
333 } 324 }
325 #endif
334 326
335 327
336 /* 328 /*
337 * l1dmacro_idle 329 * l1dmacro_idle
338 * 330 *
372 */ 364 */
373 void l1dmacro_synchro (UWORD32 when, UWORD32 value) 365 void l1dmacro_synchro (UWORD32 when, UWORD32 value)
374 { 366 {
375 // WARNING: 'when' must always be comprised between 0 and TPU_CLOCK_RANGE !!! 367 // WARNING: 'when' must always be comprised between 0 and TPU_CLOCK_RANGE !!!
376 #if (TRACE_TYPE!=0) && (TRACE_TYPE!=5) 368 #if (TRACE_TYPE!=0) && (TRACE_TYPE!=5)
377 trace_fct(CST_L1DMACRO_SYNCHRO, 1);//omaps00090550 369 trace_fct(CST_L1DMACRO_SYNCHRO, -1);
378 #endif 370 #endif
379 371
380 if (value != IMM) // IMM indicates to set directly without AT 372 if (value != IMM) // IMM indicates to set directly without AT
381 { 373 {
382 *TP_Ptr++ = TPU_FAT(when); 374 *TP_Ptr++ = TPU_FAT(when);
392 * 384 *
393 */ 385 */
394 void l1dmacro_adc_read_rx(void) 386 void l1dmacro_adc_read_rx(void)
395 { 387 {
396 388
397 #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3)) 389 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
398 // TSP needs to be configured in order to send serially to Omega 390 // TSP needs to be configured in order to send serially to Omega
399 391
400 // *TP_Ptr++ = TPU_MOVE (TSP_SPI_SET1, TSP_CLK_RISE); // Clock configuration 392 // *TP_Ptr++ = TPU_MOVE (TSP_SPI_SET1, TSP_CLK_RISE); // Clock configuration
401 *TP_Ptr++ = TPU_WAIT (5); 393 *TP_Ptr++ = TPU_WAIT (5);
402 *TP_Ptr++ = TPU_MOVE (TSP_CTRL1,6); // Device and Nb of bits configuration 394 *TP_Ptr++ = TPU_MOVE (TSP_CTRL1,6); // Device and Nb of bits configuration
414 #endif 406 #endif
415 #endif 407 #endif
416 #endif 408 #endif
417 409
418 #if (L1_MADC_ON == 1) 410 #if (L1_MADC_ON == 1)
419 #if (ANALOG == 11) 411 #if (ANLG_FAM == 11)
420 412
421 #if (TRACE_TYPE==1)||(TRACE_TYPE ==4) 413 #if (TRACE_TYPE==1)||(TRACE_TYPE ==4)
422 #if (GSM_IDLE_RAM == 0) 414 #if (GSM_IDLE_RAM == 0)
423 l1_trace_ADC(0); 415 l1_trace_ADC(0);
424 #else 416 #else
455 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,START_ADC); 447 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,START_ADC);
456 *TP_Ptr++ = TPU_WAIT (2); 448 *TP_Ptr++ = TPU_WAIT (2);
457 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,0); 449 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,0);
458 450
459 #if (L1_MADC_ON == 1) 451 #if (L1_MADC_ON == 1)
460 #if (ANALOG == 11) 452 #if (ANLG_FAM == 11)
461 453
462 #if (TRACE_TYPE==1)||(TRACE_TYPE ==4) 454 #if (TRACE_TYPE==1)||(TRACE_TYPE ==4)
463 #if (GSM_IDLE_RAM == 0) 455 #if (GSM_IDLE_RAM == 0)
464 l1_trace_ADC(0); 456 l1_trace_ADC(0);
465 #else 457 #else
483 * l1dmacro_adc_read_tx 475 * l1dmacro_adc_read_tx
484 * 476 *
485 */ 477 */
486 478
487 479
488 #if (ANALOG != 11) 480 #if (ANLG_FAM != 11)
489 void l1dmacro_adc_read_tx(UWORD32 when) 481 void l1dmacro_adc_read_tx(UWORD32 when)
490 #else 482 #else
491 void l1dmacro_adc_read_tx(UWORD32 when, UWORD8 tx_up_state) 483 void l1dmacro_adc_read_tx(UWORD32 when, UWORD8 tx_up_state)
492 #endif 484 #endif
493 { 485 {
494 486
495 #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3)) 487 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
496 488
497 *TP_Ptr++ = TPU_FAT (when); 489 *TP_Ptr++ = TPU_FAT (when);
498 *TP_Ptr++ = TPU_MOVE (TSP_CTRL1,6); // Device and Nb of bits configuration 490 *TP_Ptr++ = TPU_MOVE (TSP_CTRL1,6); // Device and Nb of bits configuration
499 *TP_Ptr++ = TPU_MOVE (TSP_TX_REG_1, STARTADC|BULON|BULENA); // Load data to send 491 *TP_Ptr++ = TPU_MOVE (TSP_TX_REG_1, STARTADC|BULON|BULENA); // Load data to send
500 *TP_Ptr++ = TPU_MOVE (TSP_CTRL2, TC2_WR); // Start serialization command and adc conversion 492 *TP_Ptr++ = TPU_MOVE (TSP_CTRL2, TC2_WR); // Start serialization command and adc conversion
506 l1_trace_ADC(1); 498 l1_trace_ADC(1);
507 #endif 499 #endif
508 #endif 500 #endif
509 501
510 #if (L1_MADC_ON == 1) 502 #if (L1_MADC_ON == 1)
511 #if (ANALOG == 11) 503 #if (ANLG_FAM == 11)
512 *TP_Ptr++ = TPU_FAT (when); 504 *TP_Ptr++ = TPU_FAT (when);
513 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,tx_up_state | START_ADC); 505 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,tx_up_state | START_ADC);
514 *TP_Ptr++ = TPU_WAIT (2); 506 *TP_Ptr++ = TPU_WAIT (2);
515 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,tx_up_state); 507 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,tx_up_state);
516 508