# HG changeset patch # User Mychaela Falconia # Date 1620592686 0 # Node ID d25af5b7e773ef5ba6edc8545da4943d800ed8ff # Parent 3eccca3ac219a8677376adf37d5ce09817a51b9e etm_tmcore.c: rm trailing white space diff -r 3eccca3ac219 -r d25af5b7e773 src/cs/services/etm/etm_tmcore.c --- a/src/cs/services/etm/etm_tmcore.c Wed May 05 07:02:50 2021 +0000 +++ b/src/cs/services/etm/etm_tmcore.c Sun May 09 20:38:06 2021 +0000 @@ -1,6 +1,6 @@ /******************************************************************************** * Enhanced TestMode (ETM) - * @file tmcore.c + * @file tmcore.c * * @author Kim T. Peteren (ktp@ti.com) * @version 0.1 @@ -40,7 +40,7 @@ // See the file etm_version.h /****************************************************************************** - * DIE ID settings + * DIE ID settings *****************************************************************************/ #define BE_STREAM_TO_ARRAY(a, p, l) {register INT32 i; for (i = 0; i < l; i++) a[i] = *(UINT8*)(p)++;} @@ -62,22 +62,22 @@ /****************************************************************************** - * Internal prototypes + * Internal prototypes *****************************************************************************/ T_ETM_PKT *etm_core_setup(uint8 fid); int etm_core(uint8 *buf, int size); /****************************************************************************** - * Register the Core Module to the ETM database + * Register the Core Module to the ETM database *****************************************************************************/ int etm_core_init(void) { - int result; + int result; result = etm_register("CORE", ETM_CORE, 0, 0, etm_core); - return result; + return result; } @@ -115,7 +115,7 @@ if ((error = etm_pkt_put8(pkt, param)) < 0) { return error; } - + switch (type) { case 0: // READ(0x00) switch (unitsize) { @@ -140,10 +140,10 @@ break; } break; - } + } break; - case 16: // WRITE(0x10) + case 16: // WRITE(0x10) switch (unitsize) { case 1: mem8 = (uint8 *) addr; @@ -155,14 +155,14 @@ case 2: mem16 = (uint16 *) addr; while (num--) { - *mem16++ = tmp = etm_get16(buf); + *mem16++ = tmp = etm_get16(buf); buf += 2; } break; case 4: mem32 = (uint32 *) addr; while (num--) { - *mem32++ = etm_get32(buf); + *mem32++ = etm_get32(buf); buf += 4; } break; @@ -171,10 +171,10 @@ default: return ETM_NOSYS; } - + if (error < 0) return error; - + return ETM_OK; } @@ -185,7 +185,7 @@ // ETM sends both page value and register address in one byte. // Bit field is: PPPR RRRR -// where P = page bit, R = register address bits and X = don't care bits. +// where P = page bit, R = register address bits and X = don't care bits. int etm_codec_write(T_ETM_PKT *pkt, uint8 *buf) { @@ -200,7 +200,7 @@ page = (reg_data >> 5) & 0x3; reg = reg_data & 0x1F; data = etm_get16(buf); - + tr_etm(TgTrCore, "ETM CORE: _codec_write: page(%d) reg(%d) data(0x%x)", page, reg, (data & 0x3ff)); @@ -211,7 +211,7 @@ // The register address value is left-shifted by 1 since LSB is read/write command bit. // The value is written in the 10 MSB's of register. ABB_Write_Register_on_page(page + 1, reg << 1, (data & 0x3ff)); - } + } return ETM_OK; } @@ -223,23 +223,23 @@ volatile uint16 value; uint16 page, reg; int result, reg_data; - + reg_data = *buf; if ((result = etm_pkt_put8(pkt, reg_data)) < 0) return result; page = (reg_data >> 5) & 0x3; reg = reg_data & 0x1F; - + if (page > 7 && reg > 32) return ETM_INVAL; // The function below expects a 1 for page 0 and a 2 for page 1. // The register value is left-shifted by 1 since LSB is read/write command bit. value = ABB_Read_Register_on_page(page + 1, (reg << 1)); - + tr_etm(TgTrCore, "ETM CORE: _codec_read: page(%d) reg(%d) value(0x%x)", page, reg, value); - + result = etm_pkt_put16(pkt, value); return result; } @@ -266,18 +266,18 @@ data += 2; num = etm_get16(data); - tr_etm(TgTrCore, "ETM CORE: _echo: delay(%d) sendsize(%d) num(%d)", + tr_etm(TgTrCore, "ETM CORE: _echo: delay(%d) sendsize(%d) num(%d)", delay, sendsize, num); if (delay > 0) { rvf_delay((delay + 32) * 14 / 64); } - + for (i = 0; i < sendsize; i++) { pkt->data[i+1] = i; // data[0] = fid } - pkt->size = sendsize; + pkt->size = sendsize; return ETM_OK; } @@ -289,14 +289,14 @@ int i; tr_etm(TgTrCore, "ETM CORE: _reset: Target is Reset"); - + // Setup watchdog timer and let it timeout to make a reset *(volatile uint16*) 0xfffff804 = 0xFFFF; // Timer to watchdog *(volatile uint16*) 0xfffff800 = 0x0080; // Start timer // Apparently works it only if we read this register? i = *(volatile uint16*) 0xfffff802; *(volatile uint16*) 0xfffff802 = 0x0001; // Load timer - + return ETM_OK; } @@ -311,8 +311,8 @@ char *p; extern T_KPD_KEYPAD Kp; - type = *buf & 0x0F; - buf++; + type = *buf & 0x0F; + buf++; data = etm_get32(buf); @@ -324,14 +324,14 @@ if ((p = etm_malloc(data)) == NULL) error = ETM_NOMEM; else - error = etm_pkt_put32(pkt, (int) p); + error = etm_pkt_put32(pkt, (int) p); break; case 1: // (0x01) Free Test Buffer. p = (char *) data; - etm_free(p); + etm_free(p); break; case 2: // (0x02) Set ETM Trace mask - tr_etm_init(data); + tr_etm_init(data); break; case 3: // (0x03) Set read all mem banks stat rvf_dump_mem(); @@ -351,7 +351,7 @@ (Kp.released)(); break; default: - error = ETM_NOSYS; + error = ETM_NOSYS; } if (error < 0) @@ -377,10 +377,10 @@ tr_etm(TgTrCore, "ETM CORE: _version: fid(0x%x)", fid); - l1s_version = (T_VERSION*) l1s_get_version(); + l1s_version = (T_VERSION*) l1s_get_version(); switch (fid) { -// Code Versions related to ETM modules +// Code Versions related to ETM modules case SW_REV_ETM_CORE: error = etm_pkt_put32(pkt, ETM_CORE_VERSION); break; @@ -404,10 +404,10 @@ error = etm_pkt_put32(pkt, ETM_VERSION); break; case SW_REV_ETM_API: - error = etm_pkt_put32(pkt, ETM_API_VERSION); + error = etm_pkt_put32(pkt, ETM_API_VERSION); break; -// Code Versions related to L1, see in l1_defty.h -// Get the version on this way "revision = l1s.version.dsp_code_version;" +// Code Versions related to L1, see in l1_defty.h +// Get the version on this way "revision = l1s.version.dsp_code_version;" // doesn't work because of struct aligment -> compile flag -mw !!!! case SW_DSP_CODE_VERSION: revision = ((T_VERSION*) l1s_version)->dsp_code_version; @@ -421,7 +421,7 @@ revision = ((T_VERSION*) l1s_version)->mcu_tcs_program_release; error = etm_pkt_put32(pkt, revision); break; - case SW_MCU_TCS_OFFICIAL: // This version allso identify version of Layer1 + case SW_MCU_TCS_OFFICIAL: // This version allso identify version of Layer1 revision = ((T_VERSION*) l1s_version)->mcu_tcs_official; error = etm_pkt_put32(pkt, revision); break; @@ -436,12 +436,12 @@ default: error = ETM_NOSYS; } - + tr_etm(TgTrCore, "ETM CORE: _version: version(%d)", revision); if (error < 0) return error; - + return ETM_OK; } @@ -450,18 +450,18 @@ * Function for reading the Die-ID from base band processor. *****************************************************************************/ -int etm_dieID_read(T_ETM_PKT *pkt, uint8 *inbuf) +int etm_dieID_read(T_ETM_PKT *pkt, uint8 *inbuf) { T_RV_RET result; int8 byteCount; UINT16 dieID[DIE_ID_SIZE]; int16 index; volatile UINT16 *reg_p = (UINT16 *) DIE_ID_REG; - + tr_etm(TgTrCore, "ETM CORE: _dieID_read: started - Die-ID address(0x%x)", DIE_ID_REG); - + BE_STREAM_TO_ARRAY(dieID, reg_p, DIE_ID_SIZE); - + for (byteCount = 0; byteCount < DIE_ID_SIZE; byteCount++) { tr_etm(TgTrCore, "ETM CORE: Die-ID[%i] Byte Read(0x%x)", byteCount, (UINT16)dieID[byteCount]); @@ -486,24 +486,24 @@ uint8 mid; uint8 fid; int error = 0; - T_ETM_PKT *pkt = NULL; + T_ETM_PKT *pkt = NULL; fid = *buf++; - tr_etm(TgTrCore, "ETM CORE: _core: fid(%c):", fid); + tr_etm(TgTrCore, "ETM CORE: _core: fid(%c):", fid); /* Create TestMode return Packet */ if ((pkt = (T_ETM_PKT *) etm_malloc(sizeof(T_ETM_PKT))) == NULL) { return ETM_NOMEM; } - + // Init. of return packet pkt->mid = ETM_CORE; pkt->status = ETM_OK; pkt->size = 0; pkt->index = 0; etm_pkt_put8(pkt, fid); - + switch (fid) { #ifdef RVM_ATP_SWE case 0x60: // old 'G' @@ -519,37 +519,37 @@ case 0x63: // old 'R' error = etm_reset(); break; - case 0x64: // old 'T' + case 0x64: // old 'T' error = etm_debug(pkt, buf); break; - case 0x65: // old 'V' + case 0x65: // old 'V' error = etm_version(pkt, buf); break; case 0x66: // old 'C' error = etm_codec_read(pkt, buf); break; - case 0x67: // old 'D' - error = etm_codec_write(pkt, buf); + case 0x67: // old 'D' + error = etm_codec_write(pkt, buf); break; case 0x68: // old 'd' error = etm_dieID_read(pkt, buf); - break; + break; default: - tr_etm(TgTrCore,"ETM CORE: _core: fid ERROR"); + tr_etm(TgTrCore,"ETM CORE: _core: fid ERROR"); error = ETM_NOSYS; break; } - + if (error < 0) { - tr_etm(TgTrCore,"ETM CORE: _core: FAILED"); + tr_etm(TgTrCore,"ETM CORE: _core: FAILED"); pkt->status = -error; } - - // etm_at(): send func. is controlled by primitive + + // etm_at(): send func. is controlled by primitive if (fid == 'G' && error >= RV_OK) {} - else + else etm_pkt_send(pkt); - etm_free(pkt); + etm_free(pkt); return ETM_OK; }