FreeCalypso > hg > fc-tourmaline
view src/cs/services/dar/tests/dar_test.h @ 268:f2e52cab0a73
abb_inth.c: check all interrupt causes, not just one
The original code used if - else if - else if etc constructs, thus
the first detected interrupt was the only one handled. However,
Iota ITSTATREG is a clear-on-read register, thus if we only handle
the first detected interrupt and skip checking the others, then the
other interrupts will be lost, if more than one interrupt happened
to occur in one ABB interrupt handling cycle - a form of rare race
condition. Change the code to check all interrupts that were read
in this cycle.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Sun, 13 Jun 2021 18:17:53 +0000 |
| parents | 4e78acac3d88 |
| children |
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/********************************************************************************/ /* */ /* File Name: dar_test.h */ /* */ /* Purpose: This file contains the definition usefull for a generic dar */ /* test. */ /* */ /* Note: None. */ /* */ /* Version 0.1 */ /* */ /* Date Modification */ /* -------------------------------------------------------------------------- */ /* 26 september 2001 Create */ /* */ /* Author Stephanie Gerthoux */ /* */ /* (C) Copyright 2001 by Texas Instruments Incorporated, All Rights Reserved */ /********************************************************************************/ #ifndef _DAR_TEST_H_ #define _DAR_TEST_H_ #include "rvf/rvf_api.h" #include "tests/rv/rv_test_filter.h" #if ((DAR_REGR == SW_COMPILED) || (DAR_MISC == SW_COMPILED)) /* Define the global variables used with DAR test level */ extern T_RVF_MB_ID mb_dar_test; /* Define the parameters used with DAR test level */ /* Define the macros used with DAR test level */ /* Define function prototypes used with DAR test level */ #endif /* #if (DAR_REGR == SW_COMPILED) || (DAR_MISC == SW_COMPILED)) */ #endif
