FreeCalypso > hg > fc-tourmaline
view cdg-hybrid/sap/cci.pdf @ 268:f2e52cab0a73
abb_inth.c: check all interrupt causes, not just one
The original code used if - else if - else if etc constructs, thus
the first detected interrupt was the only one handled. However,
Iota ITSTATREG is a clear-on-read register, thus if we only handle
the first detected interrupt and skip checking the others, then the
other interrupts will be lost, if more than one interrupt happened
to occur in one ABB interrupt handling cycle - a form of rare race
condition. Change the code to check all interrupts that were read
in this cycle.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Sun, 13 Jun 2021 18:17:53 +0000 |
| parents | 35f7a1dc9f7d |
| children |
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;******************************************************************************** ;*** File : cci.pdf ;*** Creation : Wed Mar 11 09:57:44 CST 2009 ;*** XSLT Processor : Apache Software Foundation / http://xml.apache.org/xalan-j / supports XSLT-Ver: 1 ;*** Copyright : (c) Texas Instruments AG, Berlin Germany 2002 ;******************************************************************************** ;*** Document Type : Service Access Point Specification ;*** Document Name : cci ;*** Document No. : 8441.118.00.017 ;*** Document Date : 2003-01-13 ;*** Document Status: BEING_PROCESSED ;*** Document Author: UT ;******************************************************************************** PRAGMA SRC_FILE_TIME "Thu Nov 29 09:37:42 2007" PRAGMA LAST_MODIFIED "2003-01-13" PRAGMA ID_AND_VERSION "8441.118.00.017" VALTAB VAL_algo_type VAL 0 CCI_ALGO_V42 "V42bis algorithm" VALTAB VAL_comp_inst VAL 0 CCI_COMP_INST_V42_0 "first instance for V42bis" VAR algo_type "algorithm type" B VAL @p_cci - VAL_algo_type@ VAR comp_inst "compressor instance" B VAL @p_cci - VAL_comp_inst@ ; CCI_INIT_REQ 0x3604 PRIM CCI_INIT_REQ 0x3604 { algo_type ; algorithm type comp_inst ; compressor instance }