FreeCalypso > hg > fc-tourmaline
view cdg-hybrid/sap-inline/cl_inline.h @ 268:f2e52cab0a73
abb_inth.c: check all interrupt causes, not just one
The original code used if - else if - else if etc constructs, thus
the first detected interrupt was the only one handled. However,
Iota ITSTATREG is a clear-on-read register, thus if we only handle
the first detected interrupt and skip checking the others, then the
other interrupts will be lost, if more than one interrupt happened
to occur in one ABB interrupt handling cycle - a form of rare race
condition. Change the code to check all interrupts that were read
in this cycle.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Sun, 13 Jun 2021 18:17:53 +0000 |
| parents | 35f7a1dc9f7d |
| children |
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/*** ;******************************************************************************** ;*** File : cl_inline.h ;*** Creation : Wed Mar 11 09:58:09 CST 2009 ;*** XSLT Processor : Apache Software Foundation / http://xml.apache.org/xalan-j / supports XSLT-Ver: 1 ;*** Copyright : (c) Texas Instruments AG, Berlin Germany 2002 ;******************************************************************************** ;*** Document Type : Service Access Point Specification ;*** Document Name : cl ;*** Document No. : 8010.149.04.012 ;*** Document Date : 2004-06-08 ;*** Document Status: SUBMITTED ;*** Document Author: rpk ;******************************************************************************** ;*** !!! THIS INCLUDE FILE WAS GENERATED AUTOMATICALLY, DO NOT MODIFY !!! ;******************************************************************************** ***/ #ifndef _CL_INLINE_H_ #define _CL_INLINE_H_ extern void cl_nwrl_set_sgsn_release ( U8 sgsn_rel ); extern U8 cl_nwrl_get_sgsn_release ( void ); extern U8 cl_qos_convert_r99_to_r97 ( T_PS_qos_r99 *src_qos_r99, T_PS_qos_r97 *dst_qos_r97 ); extern U8 cl_qos_convert_r97_to_r99 ( T_PS_qos_r97 *src_qos_r97, T_PS_qos_r99 *dst_qos_r99 ); #endif /* !_CL_INLINE_H_ */