view cdg-hybrid/cdginc/p_8010_136_simdrv_sap.h @ 268:f2e52cab0a73

abb_inth.c: check all interrupt causes, not just one The original code used if - else if - else if etc constructs, thus the first detected interrupt was the only one handled. However, Iota ITSTATREG is a clear-on-read register, thus if we only handle the first detected interrupt and skip checking the others, then the other interrupts will be lost, if more than one interrupt happened to occur in one ABB interrupt handling cycle - a form of rare race condition. Change the code to check all interrupts that were read in this cycle.
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 13 Jun 2021 18:17:53 +0000
parents 35f7a1dc9f7d
children
line wrap: on
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/*
+--------------------------------------------------------------------------+
| PROJECT : PROTOCOL STACK                                                 |
| FILE    : p_8010_136_simdrv_sap.h                                        |
| SOURCE  : "sap\8010_136_SIMDRV_SAP.pdf"                                  |
| LastModified : "2004-06-10"                                              |
| IdAndVersion : "8010.136.03.009"                                         |
| SrcFileTime  : "Thu Nov 29 09:27:56 2007"                                |
| Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016                   |
|           !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!!                |
+--------------------------------------------------------------------------+
*/

/* PRAGMAS
 * PREFIX                 : SIMDRV
 * COMPATIBILITY_DEFINES  : NO
 * ALWAYS_ENUM_IN_VAL_FILE: YES
 * ENABLE_GROUP: YES
 * CAPITALIZE_TYPENAME: NO
 */


#ifndef P_8010_136_SIMDRV_SAP_H
#define P_8010_136_SIMDRV_SAP_H


#define CDG_ENTER__P_8010_136_SIMDRV_SAP_H

#define CDG_ENTER__FILENAME _P_8010_136_SIMDRV_SAP_H
#define CDG_ENTER__P_8010_136_SIMDRV_SAP_H__FILE_TYPE CDGINC
#define CDG_ENTER__P_8010_136_SIMDRV_SAP_H__LAST_MODIFIED _2004_06_10
#define CDG_ENTER__P_8010_136_SIMDRV_SAP_H__ID_AND_VERSION _8010_136_03_009

#define CDG_ENTER__P_8010_136_SIMDRV_SAP_H__SRC_FILE_TIME _Thu_Nov_29_09_27_56_2007

#include "CDG_ENTER.h"

#undef CDG_ENTER__P_8010_136_SIMDRV_SAP_H

#undef CDG_ENTER__FILENAME


#include "p_8010_136_simdrv_sap.val"


/*
 * typedef between var and valtab enums
 */
#ifndef __T_SIMDRV_reset_return_val__
#define __T_SIMDRV_reset_return_val__
typedef T_SIMDRV_VAL_reset_return_val T_SIMDRV_reset_return_val;
#endif

#ifndef __T_SIMDRV_len__
#define __T_SIMDRV_len__
typedef T_SIMDRV_VAL_len T_SIMDRV_len;
#endif

#ifndef __T_SIMDRV_sw1_2__
#define __T_SIMDRV_sw1_2__
typedef T_SIMDRV_VAL_sw1_2 T_SIMDRV_sw1_2;
#endif

#ifndef __T_SIMDRV_cla__
#define __T_SIMDRV_cla__
typedef T_SIMDRV_VAL_cla T_SIMDRV_cla;
#endif

#ifndef __T_SIMDRV_ins__
#define __T_SIMDRV_ins__
typedef T_SIMDRV_VAL_ins T_SIMDRV_ins;
#endif

#ifndef __T_SIMDRV_voltage_select__
#define __T_SIMDRV_voltage_select__
typedef T_SIMDRV_VAL_voltage_select T_SIMDRV_voltage_select;
#endif

#ifndef __T_SIMDRV_config_requested__
#define __T_SIMDRV_config_requested__
typedef T_SIMDRV_VAL_config_requested T_SIMDRV_config_requested;
#endif

#ifndef __T_SIMDRV_reader_id__
#define __T_SIMDRV_reader_id__
typedef T_SIMDRV_VAL_reader_id T_SIMDRV_reader_id;
#endif

#ifndef __T_SIMDRV_atr_string_info__
#define __T_SIMDRV_atr_string_info__
/*
 * SIM Card Info
 * CCDGEN:WriteStruct_Count==1283
 */
typedef struct
{
  U8                        c_atr_string;             /*<  0:  1> counter                                            */
  U8                        atr_string[SIMDRV_SIZE_ATR_INFO]; /*<  1: 33> SIM Card Answer to reset string                    */
  U8                        _align0;                  /*< 34:  1> alignment                                          */
  U8                        _align1;                  /*< 35:  1> alignment                                          */
} T_SIMDRV_atr_string_info;
#endif

#ifndef __T_SIMDRV_result_info__
#define __T_SIMDRV_result_info__
/*
 * Result Buffer
 * CCDGEN:WriteStruct_Count==1285
 */
typedef struct
{
  U16                       len;                      /*<  0:  2> T_SIMDRV_len,  Maximum length of expected data     */
  U16                       c_result;                 /*<  2:  2> counter                                            */
  U8                        *result;                  /*<  4:  4> pointer codetransparent to Result byte             */
} T_SIMDRV_result_info;
#endif

#ifndef __T_SIMDRV_data_info__
#define __T_SIMDRV_data_info__
/*
 * Data element info
 * CCDGEN:WriteStruct_Count==1287
 */
typedef struct
{
  U8                        _align0;                  /*<  0:  1> alignment                                          */
  U8                        _align1;                  /*<  1:  1> alignment                                          */
  U8                        _align2;                  /*<  2:  1> alignment                                          */
  U8                        c_data;                   /*<  3:  1> counter                                            */
  U8                        *data;                    /*<  4:  4> pointer codetransparent to Data element            */
} T_SIMDRV_data_info;
#endif

#ifndef __T_SIMDRV_cmd_header__
#define __T_SIMDRV_cmd_header__
/*
 * Transparent command header
 * CCDGEN:WriteStruct_Count==1289
 */
typedef struct
{
  U8                        cla;                      /*<  0:  1> T_SIMDRV_cla,  Class Byte                          */
  U8                        ins;                      /*<  1:  1> T_SIMDRV_ins,  instruction code                    */
  U8                        p1;                       /*<  2:  1> Parameter 1 of the SIM APDU                        */
  U8                        p2;                       /*<  3:  1> Parameter 2 of the SIM APDU                        */
} T_SIMDRV_cmd_header;
#endif

#ifndef __T_SIMDRV_config_characteristics__
#define __T_SIMDRV_config_characteristics__
/*
 * Configuration Characteristics
 * CCDGEN:WriteStruct_Count==1291
 */
typedef struct
{
  U8                        uicc_characteristics;     /*<  0:  1> UICC Characteristics                               */
  U8                        _align0;                  /*<  1:  1> alignment                                          */
  U8                        _align1;                  /*<  2:  1> alignment                                          */
  U8                        _align2;                  /*<  3:  1> alignment                                          */
} T_SIMDRV_config_characteristics;
#endif


/*
 * End of substructure section, begin of primitive definition section
 */

#ifndef __T_SIMDRV_DUMMY__
#define __T_SIMDRV_DUMMY__
/*
 * 
 * CCDGEN:WriteStruct_Count==1293
 */
typedef struct
{
  T_SIMDRV_atr_string_info  *ptr_atr_string_info;     /*<  0:  4> pointer to SIM Card Info                           */
  U8                        reset_return_val;         /*<  4:  1> T_SIMDRV_reset_return_val,  Reset return value     */
  U8                        _align0;                  /*<  5:  1> alignment                                          */
  U8                        _align1;                  /*<  6:  1> alignment                                          */
  U8                        _align2;                  /*<  7:  1> alignment                                          */
  T_SIMDRV_result_info      *ptr_result_info;         /*<  8:  4> pointer to Result Buffer                           */
  U16                       len;                      /*< 12:  2> T_SIMDRV_len,  Maximum length of expected data     */
  U8                        _align3;                  /*< 14:  1> alignment                                          */
  U8                        _align4;                  /*< 15:  1> alignment                                          */
  T_SIMDRV_data_info        *ptr_data_info;           /*< 16:  4> pointer to Data element info                       */
  U16                       sw1_2;                    /*< 20:  2> T_SIMDRV_sw1_2,  Status Words                      */
  U8                        cla;                      /*< 22:  1> T_SIMDRV_cla,  Class Byte                          */
  U8                        ins;                      /*< 23:  1> T_SIMDRV_ins,  instruction code                    */
  T_SIMDRV_cmd_header       cmd_header;               /*< 24:  4> Transparent command header                         */
  U8                        voltage_select;           /*< 28:  1> T_SIMDRV_voltage_select,  Perform Voltage Selection */
  U8                        p1;                       /*< 29:  1> Parameter 1 of the SIM APDU                        */
  U8                        p2;                       /*< 30:  1> Parameter 2 of the SIM APDU                        */
  U8                        config_requested;         /*< 31:  1> T_SIMDRV_config_requested,  Configuration Characteristics requested */
  T_SIMDRV_config_characteristics *ptr_config_characteristics; /*< 32:  4> pointer to Configuration Characteristics           */
  U8                        reader_id;                /*< 36:  1> T_SIMDRV_reader_id,  Reader Id                     */
  U8                        uicc_characteristics;     /*< 37:  1> UICC Characteristics                               */
  U8                        _align5;                  /*< 38:  1> alignment                                          */
  U8                        _align6;                  /*< 39:  1> alignment                                          */
} T_SIMDRV_DUMMY;
#endif


#include "CDG_LEAVE.h"


#endif