view src/g23m-aci/aci/ati_fcmisc.c @ 223:740a8e8fc9d7

startup sync logic rework for the new PWON button boot scheme Previously we added logic to the MMI task to hold off PEI init until R2D is running, and then extended that condition to wait for FCHG init too. However, the dependencies of MMI upon R2D and FCHG don't start until mmiInit(), and that call is driven by Switch_ON() code, hence the wait for R2D and FCHG init can be made in that code path instead of the MMI task. Furthermore, with our new way of signaling PWON button boot to MMI, we need a new wait to ensure that the MMI task is up - previously this assurance was provided by the wait for Kp pointers to be set. Solution: revert our previous PEI init hold-off additions to MMI, add a new flag indicating MMI task init done, and put the combined wait for all needed conditions into our new PWON button boot code in power.c.
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 27 Apr 2021 06:24:52 +0000
parents fa8dc04885d8
children a927f030a4e0
line wrap: on
line source

/*
 * This module implements miscellaneous FreeCalypso-added AT commands.
 */

#ifndef ATI_FCMISC_C
#define ATI_FCMISC_C

#include "aci_all.h"

#include <ctype.h>
#include <string.h>

#include "aci_cmh.h"
#include "ati_cmd.h"
#include "aci_cmd.h"
#include "aci_io.h"
#include "aci_cmd.h"
#include "l4_tim.h"
#include "line_edit.h"
#include "aci_lst.h"

#include "pcm.h"
#include "audio.h"
#include "aci.h"
#include "rx.h"
#include "pwr.h"
#include "l4_tim.h"

#ifdef GPRS
#ifdef DTI
#include "dti.h"
#include "dti_conn_mng.h"
#include "dti_cntrl_mng.h"
#endif /* DTI */
#include "gaci.h"
#include "gaci_cmh.h"
#include "gaci_cmd.h"
#endif  /* GPRS */

#include "aci_mem.h"
#include "aci_prs.h"

#include "ati_int.h"

#ifndef _SIMULATION_
#include "ffs/ffs.h"
#endif

#ifdef FF_ATI_BAT

#include "typedefs.h"
#include "gdd.h"
#include "bat.h"

#include "ati_bat.h"

#endif /*FF_ATI_BAT*/

#include "main/sys_types.h"
#include "fc-target.h"
#include "armio.h"

extern SYS_UWORD8 SIM_allow_speed_enhancement;

/* AT@SPENH - enable or disable SIM speed enhancement */
GLOBAL T_ATI_RSLT atAtSPENH ( char *cl, UBYTE srcId )
{
	int state, nonvol = 0;

	TRACE_FUNCTION("atAtSPENH()");

	cl = parse(cl, "Dd", &state, &nonvol);
	if (!cl)
		return (ATI_FAIL);
	if (state != 0 && state != 1)
		return (ATI_FAIL);
	SIM_allow_speed_enhancement = state;
	if (!nonvol)
		return (ATI_CMPL);
	ffs_mkdir("/etc");
	if (ffs_file_write("/etc/SIM_spenh", &SIM_allow_speed_enhancement, 1,
			   FFS_O_CREATE | FFS_O_TRUNC) == EFFS_OK)
		return (ATI_CMPL);
	else
		return (ATI_FAIL);
}

GLOBAL T_ATI_RSLT queatAtSPENH (char *cl, UBYTE srcId)
{
	char *me="@SPENH: ";

	TRACE_FUNCTION("queatAtSPENH()");

	sprintf(g_sa, "%s%u", me, SIM_allow_speed_enhancement);
	io_sendMessage(srcId, g_sa, ATI_NORMAL_OUTPUT);
	return (ATI_CMPL);
}

#ifdef TARGET_HAS_LPG
/* AT@LPG - program LPG output */
GLOBAL T_ATI_RSLT atAtLPG ( char *cl, UBYTE srcId )
{
	unsigned glob, period = 0, ontime = 0;

	TRACE_FUNCTION("atAtLPG()");

	cl = parse(cl, "Ddd", &glob, &period, &ontime);
	if (!cl)
		return (ATI_FAIL);
	if (glob > 3 || period > 7 || ontime > 7)
		return (ATI_FAIL);
	*(volatile SYS_UWORD8 *)0xFFFE7801 = 0x01;
	*(volatile SYS_UWORD8 *)0xFFFE7800 =
					(glob << 6) | (ontime << 3) | period;
	return (ATI_CMPL);
}

GLOBAL T_ATI_RSLT queatAtLPG (char *cl, UBYTE srcId)
{
	char *me="@LPG: ";
	SYS_UWORD8 regval;
	unsigned glob, period, ontime;

	TRACE_FUNCTION("queatAtLPG()");

	regval = *(volatile SYS_UWORD8 *)0xFFFE7800;
	glob = (regval >> 6) & 3;
	ontime = (regval >> 3) & 7;
	period = regval & 7;
	sprintf(g_sa, "%s%u,%u,%u", me, glob, period, ontime);
	io_sendMessage(srcId, g_sa, ATI_NORMAL_OUTPUT);
	return (ATI_CMPL);
}
#endif	/* TARGET_HAS_LPG */

#ifdef TARGET_HAS_PWL
/* AT@PWL - program PWL output */
GLOBAL T_ATI_RSLT atAtPWL ( char *cl, UBYTE srcId )
{
	unsigned level;

	TRACE_FUNCTION("atAtPWL()");

	cl = parse(cl, "D", &level);
	if (!cl)
		return (ATI_FAIL);
	if (level > 255)
		return (ATI_FAIL);
	*(volatile SYS_UWORD8 *)0xFFFE8000 = level;
	*(volatile SYS_UWORD8 *)0xFFFE8001 = 0x01;
	return (ATI_CMPL);
}

GLOBAL T_ATI_RSLT queatAtPWL (char *cl, UBYTE srcId)
{
	char *me="@PWL: ";
	SYS_UWORD8 regval;

	TRACE_FUNCTION("queatAtPWL()");

	regval = *(volatile SYS_UWORD8 *)0xFFFE8000;
	sprintf(g_sa, "%s%u", me, regval);
	io_sendMessage(srcId, g_sa, ATI_NORMAL_OUTPUT);
	return (ATI_CMPL);
}
#endif	/* TARGET_HAS_PWL */

/* AT+IOR - read GPIO pin */
GLOBAL T_ATI_RSLT atPlusIOR (char *cl, UBYTE srcId)
{
	char *me="+IOR: ";
	unsigned ionum;
	int state;

	TRACE_FUNCTION("atPlusIOR()");

	cl = parse(cl, "D", &ionum);
	if (!cl)
		return (ATI_FAIL);
	if (ionum > 13)
		return (ATI_FAIL);
	state = AI_ReadBit(ionum);
	sprintf(g_sa, "%s%u,%d", me, ionum, state);
	io_sendMessage(srcId, g_sa, ATI_NORMAL_OUTPUT);
	return (ATI_CMPL);
}

/* AT+IOW - set GPIO pin */
GLOBAL T_ATI_RSLT atPlusIOW (char *cl, UBYTE srcId)
{
	unsigned ionum;
	int state;

	TRACE_FUNCTION("atPlusIOW()");

	cl = parse(cl, "DD", &ionum, &state);
	if (!cl)
		return (ATI_FAIL);
	if (ionum > 13)
		return (ATI_FAIL);
	if (state)
		AI_SetBit(ionum);
	else
		AI_ResetBit(ionum);
	return (ATI_CMPL);
}

#endif /* ATI_FCMISC_C */