FreeCalypso > hg > fc-tourmaline

view cdg-hybrid/cdginc/p_8010_142_smreg_sap.val @ 51:04aaa5622fa7

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
disable deep sleep when Iota LEDB is on TI's Iota chip docs say that CLK13M must be running in order for LEDB to work, and practical experience on Mot C139 which uses Iota LEDB for its keypad backlight concurs: if Calypso enters deep sleep while the keypad backlight is turned on, the light flickers visibly as the chipset goes into and out of deep sleep. TI's original L1 sleep manager code had logic to disable deep sleep when LT_Status() returns nonzero, but that function only works for B-Sample and C-Sample LT, always returns 0 on BOARD 41 - no check of Iota LEDB status anywhere. Change this code for our current hardware: disable deep sleep when Iota LEDB has been turned on through LLS.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 19 Oct 2020 05:11:29 +0000
parents 35f7a1dc9f7d
children
line wrap: on
line source

/*
+--------------------------------------------------------------------------+
| PROJECT : PROTOCOL STACK                                                 |
| FILE    : p_8010_142_smreg_sap.val                                       |
| SOURCE  : "sap\8010_142_smreg_sap.pdf"                                   |
| LastModified : "2003-08-22"                                              |
| IdAndVersion : "8010.142.02.011"                                         |
| SrcFileTime  : "Thu Nov 29 09:28:36 2007"                                |
| Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016                   |
|           !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!!                |
+--------------------------------------------------------------------------+
*/

/* PRAGMAS
 * PREFIX                 : SMREG
 * COMPATIBILITY_DEFINES  : NO
 * ALWAYS_ENUM_IN_VAL_FILE: YES
 * ENABLE_GROUP: NO
 * CAPITALIZE_TYPENAME: NO
 */


#ifndef P_8010_142_SMREG_SAP_VAL
#define P_8010_142_SMREG_SAP_VAL


#define CDG_ENTER__P_8010_142_SMREG_SAP_VAL

#define CDG_ENTER__FILENAME _P_8010_142_SMREG_SAP_VAL
#define CDG_ENTER__P_8010_142_SMREG_SAP_VAL__FILE_TYPE CDGINC
#define CDG_ENTER__P_8010_142_SMREG_SAP_VAL__LAST_MODIFIED _2003_08_22
#define CDG_ENTER__P_8010_142_SMREG_SAP_VAL__ID_AND_VERSION _8010_142_02_011

#define CDG_ENTER__P_8010_142_SMREG_SAP_VAL__SRC_FILE_TIME _Thu_Nov_29_09_28_36_2007

#include "CDG_ENTER.h"

#undef CDG_ENTER__P_8010_142_SMREG_SAP_VAL

#undef CDG_ENTER__FILENAME

#include "p_8010_152_ps_include.val"   /* Access values independent from the corresponding h-file. */

#include "p_8010_137_nas_include.val"   /* Access values independent from the corresponding h-file. */

#include "p_8010_153_cause_include.val"   /* Access values independent from the corresponding h-file. */


/*
 * Enum to value table VAL_pdp_type
 * CCDGEN:WriteEnum_Count==69
 */
#ifndef __T_SMREG_VAL_pdp_type__
#define __T_SMREG_VAL_pdp_type__
typedef enum
{
  SMREG_PDP_PPP                  = 0x1,           /* PDP type PPP                   */
  SMREG_PDP_EMPTY                = 0xf,           /* Dynamic address assignment in effect */
  SMREG_PDP_IPV4                 = 0x21,          /* IP version 4                   */
  SMREG_PDP_IPV6                 = 0x57           /* IP version 6                   */
}T_SMREG_VAL_pdp_type;
#endif

#include "CDG_LEAVE.h"


#endif