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comparison src/cs/drivers/drv_app/sim/sim32.c @ 189:b37e6c916df1

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../drv_app/sim/*: rm trailing white space
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 30 Jan 2021 06:34:22 +0000
parents 4e78acac3d88
children cf882d95c799
comparison
equal deleted inserted replaced
188:92abb46dc1ba 189:b37e6c916df1
13 13
14 #include "chipset.cfg" 14 #include "chipset.cfg"
15 15
16 #include "main/sys_types.h" 16 #include "main/sys_types.h"
17 #include <assert.h> 17 #include <assert.h>
18 #include "inth/iq.h" 18 #include "inth/iq.h"
19 #include "sim.h" 19 #include "sim.h"
20 20
21 21
22 #ifdef SIM_DEBUG_TRACE 22 #ifdef SIM_DEBUG_TRACE
23 /* working buffer for NULL BYTE */ 23 /* working buffer for NULL BYTE */
31 #endif 31 #endif
32 32
33 /* 33 /*
34 * SIM_IntHandler 34 * SIM_IntHandler
35 * 35 *
36 * Read cause of SIM interrupt : 36 * Read cause of SIM interrupt :
37 * 37 *
38 * if receive buffer full, read char 38 * if receive buffer full, read char
39 * if transmitter empty, change direction, transmit a dummy char 39 * if transmitter empty, change direction, transmit a dummy char
40 * 40 *
41 */ 41 */
42 void SIM_IntHandler(void) 42 void SIM_IntHandler(void)
43 { 43 {
44 volatile unsigned short it, i, stat, conf1; 44 volatile unsigned short it, i, stat, conf1;
45 volatile SYS_UWORD8 ins; 45 volatile SYS_UWORD8 ins;
46 volatile SYS_UWORD8 rx; 46 volatile SYS_UWORD8 rx;
47 volatile SYS_UWORD8 nack; 47 volatile SYS_UWORD8 nack;
48 volatile SYS_UWORD8 nack1; 48 volatile SYS_UWORD8 nack1;
49 49
50 50
51 SIM_PORT *p; 51 SIM_PORT *p;
52 52
53 p = &(Sim[0]); 53 p = &(Sim[0]);
54 54
55 p->rxParityErr = 0; 55 p->rxParityErr = 0;
56 it = p->c->it; 56 it = p->c->it;
57 57
58 if ((it & SIM_IT_ITRX) && !(p->c->maskit & SIM_MASK_RX)) // int on reception 58 if ((it & SIM_IT_ITRX) && !(p->c->maskit & SIM_MASK_RX)) // int on reception
59 { 59 {
60 stat = p->c->rx; 60 stat = p->c->rx;
72 || ((conf1 & SIM_CONF1_CHKPAR) == 0)) 72 || ((conf1 & SIM_CONF1_CHKPAR) == 0))
73 { 73 {
74 rx = (SYS_UWORD8) (stat & 0x00FF); 74 rx = (SYS_UWORD8) (stat & 0x00FF);
75 ins = p->xbuf[1] & p->hw_mask; 75 ins = p->xbuf[1] & p->hw_mask;
76 nack = (~p->xbuf[1]) & p->hw_mask; 76 nack = (~p->xbuf[1]) & p->hw_mask;
77 77
78 switch (p->moderx) 78 switch (p->moderx)
79 { 79 {
80 case 0: //mode of normal reception without proc char (like PTS proc) 80 case 0: //mode of normal reception without proc char (like PTS proc)
81 p->rbuf[p->rx_index++] = rx; 81 p->rbuf[p->rx_index++] = rx;
82 break; 82 break;
83 83
84 case 1: //mode wait for ACK 84 case 1: //mode wait for ACK
85 if ((rx & p->hw_mask) == ins) 85 if ((rx & p->hw_mask) == ins)
86 { 86 {
87 p->moderx = 2; 87 p->moderx = 2;
88 } 88 }
89 else if ((rx & p->hw_mask) == nack) 89 else if ((rx & p->hw_mask) == nack)
90 { 90 {
91 p->moderx = 4; 91 p->moderx = 4;
92 } 92 }
93 else if (((rx & 0xF0) == 0x60) || ((rx & 0xF0) == 0x90)) 93 else if (((rx & 0xF0) == 0x60) || ((rx & 0xF0) == 0x90))
94 { 94 {
95 if (rx != 0x60) //in case of error code (SW1/SW2) returned by sim card 95 if (rx != 0x60) //in case of error code (SW1/SW2) returned by sim card
96 { 96 {
106 } 106 }
107 } 107 }
108 else 108 else
109 { 109 {
110 p->errorSIM = SIM_ERR_ABNORMAL_CASE2; 110 p->errorSIM = SIM_ERR_ABNORMAL_CASE2;
111 } 111 }
112 //if rx = 0x60 wait for ACK 112 //if rx = 0x60 wait for ACK
113 break; 113 break;
114 114
115 case 2: //mode reception by block 115 case 2: //mode reception by block
116 p->rbuf[p->rx_index++] = rx; 116 p->rbuf[p->rx_index++] = rx;
117 117
118 if(p->expected_data == 256) 118 if(p->expected_data == 256)
119 { 119 {
120 if (p->rx_index == 0) 120 if (p->rx_index == 0)
121 { 121 {
122 p->moderx = 5; 122 p->moderx = 5;
123 } 123 }
124 } 124 }
125 else 125 else
126 { 126 {
127 if (p->rx_index == p->expected_data) 127 if (p->rx_index == p->expected_data)
128 { 128 {
129 p->moderx = 5; 129 p->moderx = 5;
130 } 130 }
131 } 131 }
132 break; 132 break;
133 133
134 case 3: //mode reception char by char. reception of proc char 134 case 3: //mode reception char by char. reception of proc char
135 if ((rx & p->hw_mask) == ins) 135 if ((rx & p->hw_mask) == ins)
136 { 136 {
137 p->moderx = 2; 137 p->moderx = 2;
138 } 138 }
139 else if ((rx & p->hw_mask) == nack) 139 else if ((rx & p->hw_mask) == nack)
140 { 140 {
141 p->moderx = 4; 141 p->moderx = 4;
142 } //if rx = 0x60 wait for ACK 142 } //if rx = 0x60 wait for ACK
143 else if (rx == 0x60) 143 else if (rx == 0x60)
144 { 144 {
145 p->null_received == 1; 145 p->null_received == 1;
146 #ifdef SIM_DEBUG_TRACE 146 #ifdef SIM_DEBUG_TRACE
147 SIM_dbg_null[1]++; 147 SIM_dbg_null[1]++;
148 #endif 148 #endif
149 } 149 }
150 150
151 break; 151 break;
152 152
153 case 4: //mode reception char by char. reception of data 153 case 4: //mode reception char by char. reception of data
154 p->rbuf[p->rx_index++] = rx; 154 p->rbuf[p->rx_index++] = rx;
155 p->moderx = 3; //switch to receive proc char mode 155 p->moderx = 3; //switch to receive proc char mode
156 156
157 if(p->expected_data == 256) 157 if(p->expected_data == 256)
158 { 158 {
159 if (p->rx_index == 0) 159 if (p->rx_index == 0)
160 { 160 {
161 p->moderx = 5; 161 p->moderx = 5;
162 } 162 }
163 } 163 }
164 else 164 else
165 { 165 {
166 if (p->rx_index == p->expected_data) 166 if (p->rx_index == p->expected_data)
167 { 167 {
168 p->moderx = 5; 168 p->moderx = 5;
169 } 169 }
170 } 170 }
171 break; 171 break;
172 172
173 case 5: //mode wait for procedure character except NULL 173 case 5: //mode wait for procedure character except NULL
174 if ((rx != 0x60) || (p->SWcount != 0)) //treat NULL character only if arriving before SW1 SW2 174 if ((rx != 0x60) || (p->SWcount != 0)) //treat NULL character only if arriving before SW1 SW2
175 { 175 {
176 p->rSW12[p->SWcount++] = rx; 176 p->rSW12[p->SWcount++] = rx;
177 } 177 }
183 #endif 183 #endif
184 } 184 }
185 185
186 186
187 break; 187 break;
188 188
189 case 6: //give the acknowledge char 189 case 6: //give the acknowledge char
190 if (((rx & 0xF0) == 0x60) || ((rx & 0xF0) == 0x90)) 190 if (((rx & 0xF0) == 0x60) || ((rx & 0xF0) == 0x90))
191 { 191 {
192 if (rx != 0x60) //in case of error code (SW1/SW2) returned by sim card 192 if (rx != 0x60) //in case of error code (SW1/SW2) returned by sim card
193 { 193 {
201 SIM_dbg_null[3]++; 201 SIM_dbg_null[3]++;
202 #endif 202 #endif
203 } 203 }
204 } 204 }
205 else 205 else
206 { 206 {
207 p->ack = rx; 207 p->ack = rx;
208 } 208 }
209 } 209 }
210 } 210 }
211 else 211 else
233 p->c->tx = *(p->xOut); // transmit 233 p->c->tx = *(p->xOut); // transmit
234 234
235 p->conf1 &= ~SIM_CONF1_TXRX; // return the direction 235 p->conf1 &= ~SIM_CONF1_TXRX; // return the direction
236 p->c->conf1 = p->conf1; 236 p->c->conf1 = p->conf1;
237 } 237 }
238 238
239 if (p->xOut < (p->xIn - 2)) 239 if (p->xOut < (p->xIn - 2))
240 { 240 {
241 p->xOut++; 241 p->xOut++;
242 p->c->tx = *(p->xOut); // transmit 242 p->c->tx = *(p->xOut); // transmit
243 } 243 }
244 } 244 }
245 } 245 }
246 else 246 else
247 { 247 {
248 p->c->tx = *(p->xOut); // transmit same char 248 p->c->tx = *(p->xOut); // transmit same char
249 p->txParityErr++; // count number of transmit parity errors 249 p->txParityErr++; // count number of transmit parity errors
250 } 250 }
251 251
252 } 252 }
253 253
254 // Handle errors 254 // Handle errors
255 if ((it & SIM_IT_ITOV) && !(p->c->maskit & SIM_MASK_OV)) 255 if ((it & SIM_IT_ITOV) && !(p->c->maskit & SIM_MASK_OV))
256 { 256 {
257 p->errorSIM = SIM_ERR_OVF; 257 p->errorSIM = SIM_ERR_OVF;
258 258
259 } 259 }
260 if ((it & SIM_IT_WT) && !(p->c->maskit & SIM_MASK_WT)) 260 if ((it & SIM_IT_WT) && !(p->c->maskit & SIM_MASK_WT))
261 { 261 {
262 p->errorSIM = SIM_ERR_READ; 262 p->errorSIM = SIM_ERR_READ;
263 } 263 }
285 285
286 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) 286 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
287 /* 287 /*
288 * SIM_CD_IntHandler 288 * SIM_CD_IntHandler
289 * 289 *
290 * Read cause of SIM interrupt : 290 * Read cause of SIM interrupt :
291 * 291 *
292 */ 292 */
293 void SIM_CD_IntHandler(void) 293 void SIM_CD_IntHandler(void)
294 { 294 {
295 volatile unsigned short it_cd, stat; 295 volatile unsigned short it_cd, stat;
296 SIM_PORT *p; 296 SIM_PORT *p;
297 297
298 p = &(Sim[0]); 298 p = &(Sim[0]);
299 299
300 p->rxParityErr = 0; 300 p->rxParityErr = 0;
301 it_cd = p->c->it_cd; 301 it_cd = p->c->it_cd;
302 302
303 // SIM card insertion / extraction 303 // SIM card insertion / extraction
304 if ((it_cd & SIM_IT_CD) && !(p->c->maskit & SIM_MASK_CD)) 304 if ((it_cd & SIM_IT_CD) && !(p->c->maskit & SIM_MASK_CD))
305 { 305 {
315 315
316 316
317 // to force this module to be linked 317 // to force this module to be linked
318 SYS_UWORD16 SIM_Dummy(void) 318 SYS_UWORD16 SIM_Dummy(void)
319 { 319 {
320 320
321 } 321 }